[RFC v1 3/3] arm64: dts: realtek: rtd16xx: Add rtd16xx gmac node

[Eric Wang]

Signed-off-by: Eric Wang <ericwang at realtek.com>
---
 arch/arm64/boot/dts/realtek/rtd16xx.dtsi | 50 ++++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/arch/arm64/boot/dts/realtek/rtd16xx.dtsi b/arch/arm64/boot/dts/realtek/rtd16xx.dtsi
index 4b944e2cf346..ea02c4d8d7bc 100644
--- a/arch/arm64/boot/dts/realtek/rtd16xx.dtsi
+++ b/arch/arm64/boot/dts/realtek/rtd16xx.dtsi
@@ -189,6 +189,56 @@ scpu_wrapper: syscon at 1d000 {
 				#size-cells = <1>;
 				ranges = <0x0 0x1d000 0x1000>;
 			};
+
+			gmac: r8169soc at 16000 {
+				compatible = "realtek,rtd16xx-r8169soc";
+				reg = <0x16000 0x1000>,   /* ETN */
+				      <0x7000 0x1000>, /* ISO */
+				      <0x1c000 0x2000>, /* SBX and SC_WRAP for ACP ctrl */
+				      <0x1c8000 0x2000>, /* SDS */
+				      <0x4e000 0x1000>; /* ISO pinmux */
+				interrupts = <0 22 4>;
+				pinctrl-names = "default",
+						"sgmii";
+				pinctrl-0 = <&etn_led_pins>;
+				pinctrl-1 = <&sgmii_mdio_pins>;
+				local-mac-address = [00 10 20 30 40 50];
+				output-mode = <0>; /* 0:embedded PHY, 3:SGMII to MAC, 4:SGMII to PHY */
+				sgmii-swing = <0>; /* 0:640mV, 1:380mV, 2:250mV, 3:190mV */
+				acp = <0>; /* 0: disable, 1: enable */
+				eee = <1>; /* 0: disable, 1: enable */
+				clocks = <&ic IC_CKE_ETN_250M>,
+					 <&ic IC_CKE_ETN_SYS>,
+					 <&cc CC_CKE_SDS>;
+				clock-names = "etn_250m",
+					      "etn_sys",
+					      "sds";
+				resets = <&ic IC_RSTN_GMAC>,
+					 <&ic IC_RSTN_GPHY>,
+					 <&cc CC_RSTN_SDS_REG>,
+					 <&cc CC_RSTN_SDS>,
+					 <&cc CC_RSTN_PCIE0_POWER>,
+					 <&cc CC_RSTN_PCIE0_PHY>,
+					 <&cc CC_RSTN_PCIE0_SGMII_MDIO>,
+					 <&cc CC_RSTN_PCIE0_PHY_MDIO>;
+				reset-names = "gmac",
+					      "gphy",
+					      "sds_reg",
+					      "sds",
+					      "pcie0_power",
+					      "pcie0_phy",
+					      "pcie0_sgmii_mdio",
+					      "pcie0_phy_mdio";
+				nvmem-cells = <&otp_etn_rc_cal>, <&otp_etn_r_amp_cal>;
+				nvmem-cell-names = "rc_k", "r_amp_k";
+				status = "okay";
+				phy_0 {
+					interrupt-parent = <&iso_irq_mux>;
+					interrupts = <28>, <29>, <30>;
+					irq-mask = <0x70000000>;
+					por-xv-mask = <0x00000111>;
+				};
+			};
 		};
 
 		gic: interrupt-controller at ff100000 {
-- 
2.28.0