[PATCH 04/10] doc: dt: bindings: usb: dwc3-rtk: Add the doc about the new dwc3-rtk driver

stanley_chang stanley_chang at realtek.com
Thu Sep 17 04:38:29 EDT 2020


Realtek DHC SoCs embeds a DWC3 USB IP Core. This documentation explain the
property about dwc3-rtk glue driver

Signed-off-by: stanley_chang <stanley_chang at realtek.com>
---
 .../devicetree/bindings/usb/dwc3-rtk.yaml     | 61 +++++++++++++++++++
 1 file changed, 61 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/dwc3-rtk.yaml

diff --git a/Documentation/devicetree/bindings/usb/dwc3-rtk.yaml b/Documentation/devicetree/bindings/usb/dwc3-rtk.yaml
new file mode 100644
index 000000000000..ba079c17f65c
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/dwc3-rtk.yaml
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright 2020 Realtek Semiconductor Corporation
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/usb/dwc3-rtk.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Realtek DWC3 USB SoC Controller Glue
+
+maintainers:
+  - Stanley Chang <stanley_chang at realtek.com>
+
+description: |
+  The Realtek DHC Soc embeds a DWC3 USB IP Core configured for USB2 and USB3
+  in host or dual-role mode.
+
+  A glue connects the DWC3 core to an USB2 PHY and an USB3 PHY.
+
+  The USB2 PHY is phy-rtk-usb2 and USB3 PHY is phy-rtk-usb3.
+
+properties:
+  compatible:
+    enum:
+      - realtek,dwc3
+
+  ranges: true
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - "#address-cells"
+  - "#size-cells"
+  - ranges
+  - reg
+
+examples:
+  - |
+    dwc3_u3drd: rtk_dwc3_u3drd at 98013e00 {
+        compatible = "realtek,dwc3";
+        reg = <0x98013e00 0x200>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges;
+        delay_probe_work; //To delay probe work
+        status = "okay";
+
+        dwc3_u3drd at 981f0000 {
+            compatible = "synopsys,dwc3";
+            reg = <0x98050000 0x9000>;
+            interrupts = <0 94 4>;
+            snps,fixed_dwc3_globals_regs_start = <0x8100>;
+            usb-phy = <&dwc3_u3drd_usb2phy &dwc3_u3drd_usb3phy>;
+            dr_mode = "host"; /*only host*/
+            //tx-fifo-resize;
+            snps,dis_u2_susphy_quirk; // Disable u2phy suspend for drd
+            snps,dis_ss_park_mode; // disable usb3.0 park mode
+
+            status = "okay";
+        };
-- 
2.28.0




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