[PATCH RFC v3 12/12] arm64: dts: s32g: Add S32G3-RDB3 SerDes routing variants
sashiko-bot at kernel.org
sashiko-bot at kernel.org
Sat Sep 19 23:55:03 PDT 2026
> From: "Jan Petrous (OSS)" <jan.petrous at oss.nxp.com>
>
> The S32G3-VNP-RDB3 board wires GMAC0 to an on-board KSZ9031 RGMII PHY by
> default. Add two device tree variants that reroute GMAC0 over the
> SerDes_0 XPCS lane for SGMII, matching the two SerDes lane layouts:
>
> - Mode 1: PCIe x1 root complex on lane 0 plus 1G SGMII via GMAC0
> (XPCS0) on lane 1.
> - Mode 3: dual SGMII, GMAC0 (XPCS0) on lane 0 and PFE_EMAC_2 (XPCS1)
> on lane 1.
>
> The SerDes SUBSYS_MODE is derived from the lane child nodes present, so
> each layout requires its own board device tree. The Mode 1 variant
> enables both PCIe root complexes and extends their root ports by label
> (pcie0_rp, pcie1_rp), matching the RDB3 wiring: PCIe_0 reaches the M.2
> [ ... ]
> - Mode 1: GMAC0 SGMII path up, and both PCIe root complexes come up -
> PCIe_1 enumerates the card-slot NIC and passes traffic at full line
> rate, PCIe_0 enumerates the M.2 slot with SW17-2 ON.
>
> Signed-off-by: Jan Petrous (OSS) <jan.petrous at oss.nxp.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260919-s32g_serdes-v3-0-9d68868c1e89@oss.nxp.com?part=12
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