[PATCH RFC v3 10/12] arm64: dts: s32g: Add SerDes controller nodes

[sashiko-bot at kernel.org]

> From: "Jan Petrous (OSS)" <jan.petrous at oss.nxp.com>
> 
> Add the SerDes/PCIe combo-PHY controller nodes for S32G2 and S32G3 in
> the disabled state. Each SoC integrates two SerDes instances (SerDes_0
> and SerDes_1) with identical register layout; every instance exposes
> the PCIe PHY and the two XPCS instances used for SGMII. Board device
> trees enable the required instance and add the lane PHY child nodes
> matching the wanted SerDes subsystem mode.
> 
> Signed-off-by: Jan Petrous (OSS) <jan.petrous at oss.nxp.com>

Sashiko has reviewed this patch and found no issues. It looks great!

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Sashiko AI review · https://sashiko.dev/#/patchset/20260919-s32g_serdes-v3-0-9d68868c1e89@oss.nxp.com?part=10