[PATCH RFC v3 03/12] dt-bindings: PCI: nxp,s32g-pcie: Fix SerDes PHY phandle in example

sashiko-bot at kernel.org sashiko-bot at kernel.org
Sat Sep 19 23:54:52 PDT 2026


> From: "Jan Petrous (OSS)" <jan.petrous at oss.nxp.com>
> 
> The example references the SerDes PHY as
> 
>   phys = <&serdes0 PHY_TYPE_PCIE 0 0>;
> 
> i.e. the SerDes node itself with three PHY cells. That does not match
> the SerDes binding: the per-lane child node is the generic PHY
> provider and carries '#phy-cells = <0>', while the SerDes node itself
> has no '#phy-cells' at all.
> 
> Point the example at the PCIe lane child instead, which is also what
> the S32G3 board device trees use. The dt-bindings/phy/phy.h include is
> dropped along with the now-unused PHY_TYPE_PCIE constant.
> 
> The schema itself is unchanged; 'phys: maxItems: 1' already describes
> the corrected form.
> 
> Signed-off-by: Jan Petrous (OSS) <jan.petrous at oss.nxp.com>

Sashiko has reviewed this patch and found no issues. It looks great!

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260919-s32g_serdes-v3-0-9d68868c1e89@oss.nxp.com?part=3




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