[PATCH v2 3/4] arm64: dts: qcom: qcs8300: Add qref and refgen supply for PCIe PHYs

[sashiko-bot at kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] pcie: probe failure on SA8775p due to unconditionally required QCS8300 workaround regulator
--

commit 1c7a11beac9080a5affb060c2f0b8c2011ce109b
Author: Ziyue Zhang <ziyue.zhang at oss.qualcomm.com>
Subject: arm64: dts: qcom: qcs8300: Add qref and refgen supply for PCIe PHYs

This commit adds vdda-qref-supply and vdda-refgen-supply to board DTS files and
refgen-supply to the SoC DTSI for QCS8300 due to hardware requirements for
stable operation. It also updates the driver to vote for refgen as a
workaround for a QCS8300 hardware issue.

> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
> index da83358c97ead..ab81c6e584a84 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
> @@ -4094,6 +4094,10 @@ static const char * const sm8550_qmp_phy_vreg_l[] = {
>  	"vdda-phy", "vdda-pll", "vdda-qref",
>  };
>  
> +static const char * const sa8775p_qmp_phy_vreg_l[] = {
> +	"vdda-phy", "vdda-pll", "vdda-qref", "vdda-refgen", "refgen",
> +};
> +

[Severity: High]
Does this unconditionally require the refgen supply for any configuration
using sa8775p_qmp_phy_vreg_l in drivers/phy/qualcomm/phy-qcom-qmp-pcie.c?

According to the DT bindings, refgen-supply is a hardware workaround required
only for QCS8300, and SA8775P device trees correctly do not define it.

When qmp_pcie_vreg_init() calls devm_regulator_bulk_get() on SA8775P boards,
it will fail to find refgen, which will abort the PHY probe and completely break
PCIe functionality on SA8775P.

>  /* list of resets */
>  static const char * const ipq8074_pciephy_reset_l[] = {
[ ... ]
> @@ -5324,8 +5328,8 @@ static const struct qmp_phy_cfg sa8775p_qmp_gen4x2_pciephy_cfg = {
>  
>  	.reset_list		= sdm845_pciephy_reset_l,
>  	.num_resets		= ARRAY_SIZE(sdm845_pciephy_reset_l),
> -	.vreg_list		= qmp_phy_vreg_l,
> -	.num_vregs		= ARRAY_SIZE(qmp_phy_vreg_l),
> +	.vreg_list		= sa8775p_qmp_phy_vreg_l,
> +	.num_vregs		= ARRAY_SIZE(sa8775p_qmp_phy_vreg_l),

[Severity: High]
Will the sa8775p_qmp_gen4x2_pciephy_cfg configuration incorrectly inherit the 
requirement for the QCS8300-specific refgen supply by using this shared list?

>  	.regs			= pciephy_v5_regs_layout,
>  
>  	.pwrdn_ctrl		= SW_PWRDN | REFCLK_DRV_DSBL,
[ ... ]
> @@ -5365,8 +5369,8 @@ static const struct qmp_phy_cfg sa8775p_qmp_gen4x4_pciephy_cfg = {
>  
>  	.reset_list		= sdm845_pciephy_reset_l,
>  	.num_resets		= ARRAY_SIZE(sdm845_pciephy_reset_l),
> -	.vreg_list		= qmp_phy_vreg_l,
> -	.num_vregs		= ARRAY_SIZE(qmp_phy_vreg_l),
> +	.vreg_list		= sa8775p_qmp_phy_vreg_l,
> +	.num_vregs		= ARRAY_SIZE(sa8775p_qmp_phy_vreg_l),

[Severity: High]
Could the sa8775p_qmp_gen4x4_pciephy_cfg configuration also be affected by
this requirement through the shared list?

>  	.regs			= pciephy_v5_regs_layout,

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260916102023.2054761-1-ziyue.zhang@oss.qualcomm.com?part=3