[PATCH v4 4/9] phy: qualcomm: qmp-combo: Add hardware-specific DP PHY config fields

[sashiko-bot at kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The `dp_mode_ignore_reverse` flag is not consistently honored across all DP configuration functions, leading to a broken, half-reversed PHY state when a platform requests to ignore the orientation.
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commit 65b2572e9696a201e3929e7c5e9ec1cf9107bbb5
Author: Ritesh Kumar <ritesh.kumar at oss.qualcomm.com>

phy: qualcomm: qmp-combo: Add hardware-specific DP PHY config fields

Add dp_aux_cfg2, dp_phy_cfg1, and dp_mode_ignore_reverse fields to
qmp_phy_cfg to allow hardware-specific DP PHY register values to be
specified per-platform rather than hardcoded in the configure functions.

Define named constants QSERDES_DP_PHY_AUX_CFG2_V456/V8 and
QSERDES_DP_PHY_CFG1_V456/V8 for better readability and maintainability.

Populate the new fields in all existing DP PHY cfg structures:
- V456-based platforms (sar2130p, sc8180x, sc8280xp, x1e80100, sm8250,
  sm8350, sm8475, sm8550, sm8650, sm8750) use V456 constants
- Glymur (V8) uses V8 constants and sets dp_mode_ignore_reverse = true

Update qmp_combo_configure_dp_mode() to honor dp_mode_ignore_reverse,
so Glymur can bypass TypeC orientation-based lane reversal.

> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> index 16ccabd945f71..53fc1d1e84948 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c

[ ... ]

> @@ -3539,7 +3579,9 @@ static void qmp_v3_configure_dp_tx(struct qmp_combo *qmp)
>  
>  static bool qmp_combo_configure_dp_mode(struct qmp_combo *qmp)
>  {
> -	bool reverse = (qmp->orientation == TYPEC_ORIENTATION_REVERSE);
> +	const struct qmp_phy_cfg *cfg = qmp->cfg;
> +	bool reverse = (qmp->orientation == TYPEC_ORIENTATION_REVERSE) &&
> +		       !cfg->dp_mode_ignore_reverse;

[Severity: High]
Does this ignore logic also need to be applied in qmp_v4_configure_dp_phy()
and qmp_v8_configure_dp_phy()?

Currently, those functions still independently evaluate whether to reverse:

drivers/phy/qualcomm/phy-qcom-qmp-combo.c:qmp_v8_configure_dp_phy() {
    ...
    bool reverse = (qmp->orientation == TYPEC_ORIENTATION_REVERSE);
    ...
}

If a platform sets dp_mode_ignore_reverse = true and the cable is inserted in
reverse, qmp_combo_configure_dp_mode() will correctly skip lane reversal.

However, because qmp_v8_configure_dp_phy() and qmp_v4_configure_dp_phy() do
not honor this flag, they apply the reverse logic for bias and driver enables,
which mismatches the active lanes.

Could this put the PHY into an inconsistent state where active transmitting
lanes receive the powered-down bias value (0x3f) and the powered-down lanes
receive the active bias value (0x15), causing link training to fail?

>  	const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts;
>  	u32 val;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260908-glymur-phy-v3-v4-0-ff22e5150538@oss.qualcomm.com?part=4