[PATCH v2 2/6] dt-bindings: media: qcom,glymur-camss: Add Glymur CAMSS
Bryan O'Donoghue
bod at kernel.org
Mon Sep 7 02:29:36 PDT 2026
On 07/09/2026 09:13, Nihal Kumar Gupta wrote:
> X1E80100 supports both the legacy CSIPHY resources and the new PHY API;
> Glymur uses only the new PHY API via standalone phy@ child nodes,
> so per-CSIPHY clocks, interrupts and supplies are absent here.
What's up with the commit log here ? There is no legacy CSIPHY in this.. ?
>
> X1E80100 has four CSIPHY instances while Glymur has three
> (CSIPHY0, CSIPHY1, CSIPHY4), expressed entirely in DT.
>
> Co-developed-by: Vikram Sharma <vikram.sharma at oss.qualcomm.com>
> Signed-off-by: Vikram Sharma <vikram.sharma at oss.qualcomm.com>
> Signed-off-by: Nihal Kumar Gupta <nihal.gupta at oss.qualcomm.com>
> ---
> .../bindings/media/qcom,glymur-camss.yaml | 300 +++++++++++++++++++++
> 1 file changed, 300 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/media/qcom,glymur-camss.yaml b/Documentation/devicetree/bindings/media/qcom,glymur-camss.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..a0b77edc212319fad69113f3d55ca24f184d4b23
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/qcom,glymur-camss.yaml
> @@ -0,0 +1,300 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/qcom,glymur-camss.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Glymur Camera Subsystem (CAMSS)
> +
> +maintainers:
> + - Nihal Kumar Gupta <nihal.gupta at oss.qualcomm.com>
> +
> +description:
> + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms.
> +
> +properties:
> + compatible:
> + const: qcom,glymur-camss
> +
> + reg:
> + maxItems: 13
> +
> + reg-names:
> + items:
> + - const: csid_wrapper
> + - const: csid0
> + - const: csid1
> + - const: csid2
> + - const: csid_lite0
> + - const: csid_lite1
> + - const: csitpg0
> + - const: csitpg1
> + - const: csitpg2
> + - const: vfe0
> + - const: vfe1
> + - const: vfe_lite0
> + - const: vfe_lite1
> +
> + clocks:
> + maxItems: 20
> +
> + clock-names:
> + items:
> + - const: camnoc_nrt_axi
> + - const: camnoc_rt_axi
> + - const: core_ahb
> + - const: cpas_ahb
> + - const: cpas_fast_ahb
> + - const: cpas_vfe0
> + - const: cpas_vfe1
> + - const: cpas_vfe_lite
> + - const: csid
> + - const: csid_csiphy_rx
> + - const: gcc_axi_hf
> + - const: gcc_axi_sf
> + - const: vfe0
> + - const: vfe0_fast_ahb
> + - const: vfe1
> + - const: vfe1_fast_ahb
> + - const: vfe_lite
> + - const: vfe_lite_ahb
> + - const: vfe_lite_cphy_rx
> + - const: vfe_lite_csid
> +
> + interrupts:
> + maxItems: 9
> +
> + interrupt-names:
> + items:
> + - const: csid0
> + - const: csid1
> + - const: csid2
> + - const: csid_lite0
> + - const: csid_lite1
> + - const: vfe0
> + - const: vfe1
> + - const: vfe_lite0
> + - const: vfe_lite1
> +
> + interconnects:
> + maxItems: 4
> +
> + interconnect-names:
> + items:
> + - const: ahb
> + - const: hf_mnoc
> + - const: sf_mnoc
> + - const: sf_icp_mnoc
> +
> + iommus:
> + items:
> + - description: S1 HLOS IFE and IFE_LITE non-protected
> +
> + power-domains:
> + items:
> + - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller.
> + - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller.
> + - description: Titan Top GDSC - Titan ISP Block, Global Distributed Switch Controller.
> +
> + power-domain-names:
> + items:
> + - const: ife0
> + - const: ife1
> + - const: top
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> +
> + description:
> + CSI input ports.
> +
> + patternProperties:
> + "^port@[0-3]$":
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> +
> + description:
> + Input port for receiving CSI data.
> +
> + properties:
> + endpoint:
> + $ref: video-interfaces.yaml#
> + unevaluatedProperties: false
> +
> + properties:
> + data-lanes:
> + minItems: 1
> + maxItems: 4
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - clocks
> + - clock-names
> + - interrupts
> + - interrupt-names
> + - interconnects
> + - interconnect-names
> + - iommus
> + - power-domains
> + - power-domain-names
> + - ports
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/qcom,glymur-gcc.h>
> + #include <dt-bindings/clock/qcom,glymur-camcc.h>
> + #include <dt-bindings/interconnect/qcom,glymur-rpmh.h>
> + #include <dt-bindings/interconnect/qcom,icc.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/power/qcom-rpmpd.h>
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + camss: isp at acb6000 {
> + compatible = "qcom,glymur-camss";
> +
> + reg = <0x0 0x0acb6000 0x0 0x1000>,
> + <0x0 0x0acb7000 0x0 0x2000>,
> + <0x0 0x0acb9000 0x0 0x2000>,
> + <0x0 0x0acbb000 0x0 0x2000>,
> + <0x0 0x0acc6000 0x0 0x1000>,
> + <0x0 0x0acca000 0x0 0x1000>,
> + <0x0 0x0acf6000 0x0 0x1000>,
> + <0x0 0x0acf7000 0x0 0x1000>,
> + <0x0 0x0acf8000 0x0 0x1000>,
> + <0x0 0x0ac62000 0x0 0xf000>,
> + <0x0 0x0ac71000 0x0 0xf000>,
> + <0x0 0x0acc7000 0x0 0x2000>,
> + <0x0 0x0accb000 0x0 0x2000>;
> + reg-names = "csid_wrapper",
> + "csid0",
> + "csid1",
> + "csid2",
> + "csid_lite0",
> + "csid_lite1",
> + "csitpg0",
> + "csitpg1",
> + "csitpg2",
> + "vfe0",
> + "vfe1",
> + "vfe_lite0",
> + "vfe_lite1";
> +
> + clocks = <&camcc CAM_CC_CAMNOC_AXI_NRT_CLK>,
> + <&camcc CAM_CC_CAMNOC_AXI_RT_CLK>,
> + <&camcc CAM_CC_CORE_AHB_CLK>,
> + <&camcc CAM_CC_CPAS_AHB_CLK>,
> + <&camcc CAM_CC_CPAS_FAST_AHB_CLK>,
> + <&camcc CAM_CC_CPAS_IFE_0_CLK>,
> + <&camcc CAM_CC_CPAS_IFE_1_CLK>,
> + <&camcc CAM_CC_CPAS_IFE_LITE_CLK>,
> + <&camcc CAM_CC_CSID_CLK>,
> + <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>,
> + <&gcc GCC_CAMERA_HF_AXI_CLK>,
> + <&gcc GCC_CAMERA_SF_AXI_CLK>,
> + <&camcc CAM_CC_IFE_0_CLK>,
> + <&camcc CAM_CC_IFE_0_FAST_AHB_CLK>,
> + <&camcc CAM_CC_IFE_1_CLK>,
> + <&camcc CAM_CC_IFE_1_FAST_AHB_CLK>,
> + <&camcc CAM_CC_IFE_LITE_CLK>,
> + <&camcc CAM_CC_IFE_LITE_AHB_CLK>,
> + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
> + <&camcc CAM_CC_IFE_LITE_CSID_CLK>;
> + clock-names = "camnoc_nrt_axi",
> + "camnoc_rt_axi",
> + "core_ahb",
> + "cpas_ahb",
> + "cpas_fast_ahb",
> + "cpas_vfe0",
> + "cpas_vfe1",
> + "cpas_vfe_lite",
> + "csid",
> + "csid_csiphy_rx",
> + "gcc_axi_hf",
> + "gcc_axi_sf",
> + "vfe0",
> + "vfe0_fast_ahb",
> + "vfe1",
> + "vfe1_fast_ahb",
> + "vfe_lite",
> + "vfe_lite_ahb",
> + "vfe_lite_cphy_rx",
> + "vfe_lite_csid";
> +
> + interrupts = <GIC_SPI 601 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 603 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 431 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 457 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 436 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 270 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 271 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 458 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 860 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "csid0",
> + "csid1",
> + "csid2",
> + "csid_lite0",
> + "csid_lite1",
> + "vfe0",
> + "vfe1",
> + "vfe_lite0",
> + "vfe_lite1";
> +
> + interconnects = <&hsc_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
> + &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
> + <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS
> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
> + <&mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ALWAYS
> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
> + <&mmss_noc MASTER_CAMNOC_ICP QCOM_ICC_TAG_ALWAYS
> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
> + interconnect-names = "ahb",
> + "hf_mnoc",
> + "sf_mnoc",
> + "sf_icp_mnoc";
> +
> + iommus = <&apps_smmu 0x800 0x20>;
> +
> + power-domains = <&camcc CAM_CC_IFE_0_GDSC>,
> + <&camcc CAM_CC_IFE_1_GDSC>,
> + <&camcc CAM_CC_TITAN_TOP_GDSC>;
> + power-domain-names = "ife0",
> + "ife1",
> + "top";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port at 0 {
> + reg = <0>;
> + camss_csiphy0_ep: endpoint {
> + data-lanes = <1 2 3 4>;
> + remote-endpoint = <&csiphy0_out>;
> + };
> + };
> +
> + port at 1 {
> + reg = <1>;
> + camss_csiphy1_ep: endpoint {
> + data-lanes = <1 2 3 4>;
> + remote-endpoint = <&csiphy1_out>;
> + };
> + };
> +
> + port at 3 {
> + reg = <3>;
> + camss_csiphy4_ep: endpoint {
> + data-lanes = <1 2 3 4>;
> + remote-endpoint = <&csiphy4_out>;
> + };
> + };
> + };
> + };
> + };
>
> --
> 2.34.1
>
>
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