[PATCH 3/4] dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Document the Nord QMP PHY

[Krzysztof Kozlowski]

On Tue, Sep 01, 2026 at 05:50:54PM +0800, Shawn Guo wrote:
> From: Bartosz Golaszewski <bartosz.golaszewski at oss.qualcomm.com>
> 
> Add a compatible for the USB3+DP combo QMP PHY found on the Qualcomm Nord
> SoC. The PHY sits behind a GDSC, so also allow (and require) power-domains
> for it.
> 
> The block gets a standalone compatible rather than a fallback to an
> existing one, because it is not register-compatible with any PHY already
> described here. Its USB3 and DP initialisation sequences do match sm8550,
> but Nord places the sub-blocks at different offsets within the PHY: it
> exposes a dedicated USB3_PCS_AON region at 0x1e00, which sm8550 does not
> have at all. Falling back to sm8550 - or to any other entry - would make
> the driver program the wrong addresses.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski at oss.qualcomm.com>

Best regards,
Krzysztof