[PATCH v2 6/7] arm64: dts: qcom: sm8450: Add CAMSS device tree node
Vladimir Zapolskiy
vz at kernel.org
Mon Oct 26 15:49:56 PDT 2026
Add Qualcomm SM8450 CAMSS device tree node to the platform dtsi file,
the CAMSS input ports are connected to output ports of CSIPHY devices.
Signed-off-by: Vladimir Zapolskiy <vz at kernel.org>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 173 +++++++++++++++++++++++++++
1 file changed, 173 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index f429dcaf1075..b4f7672cec94 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -3310,6 +3310,173 @@ cci1_i2c1: i2c-bus at 1 {
};
};
+ camss: isp at acb6000 {
+ compatible = "qcom,sm8450-camss";
+
+ reg = <0 0xacb6000 0 0x1000>,
+ <0 0xacb7000 0 0x1000>,
+ <0 0xacb9000 0 0x1000>,
+ <0 0xacbb000 0 0x1000>,
+ <0 0xacc6000 0 0x1000>,
+ <0 0xacca000 0 0x1000>,
+ <0 0xacf6000 0 0x1000>,
+ <0 0xacf7000 0 0x1000>,
+ <0 0xacf8000 0 0x1000>,
+ <0 0xac62000 0 0x3000>,
+ <0 0xac71000 0 0x3000>,
+ <0 0xac80000 0 0x3000>,
+ <0 0xacc7000 0 0x2000>,
+ <0 0xaccb000 0 0x2000>;
+ reg-names = "csid_wrapper",
+ "csid0",
+ "csid1",
+ "csid2",
+ "csid_lite0",
+ "csid_lite1",
+ "tpg0",
+ "tpg1",
+ "tpg2",
+ "vfe0",
+ "vfe1",
+ "vfe2",
+ "vfe_lite0",
+ "vfe_lite1";
+
+ clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
+ <&camcc CAM_CC_CORE_AHB_CLK>,
+ <&camcc CAM_CC_CPAS_AHB_CLK>,
+ <&camcc CAM_CC_CPAS_FAST_AHB_CLK>,
+ <&camcc CAM_CC_CPAS_IFE_0_CLK>,
+ <&camcc CAM_CC_CPAS_IFE_1_CLK>,
+ <&camcc CAM_CC_CPAS_IFE_2_CLK>,
+ <&camcc CAM_CC_CPAS_IFE_LITE_CLK>,
+ <&camcc CAM_CC_CSID_CLK>,
+ <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>,
+ <&gcc GCC_CAMERA_HF_AXI_CLK>,
+ <&camcc CAM_CC_IFE_0_CLK>,
+ <&camcc CAM_CC_IFE_0_FAST_AHB_CLK>,
+ <&camcc CAM_CC_IFE_1_CLK>,
+ <&camcc CAM_CC_IFE_1_FAST_AHB_CLK>,
+ <&camcc CAM_CC_IFE_2_CLK>,
+ <&camcc CAM_CC_IFE_2_FAST_AHB_CLK>,
+ <&camcc CAM_CC_IFE_LITE_CLK>,
+ <&camcc CAM_CC_IFE_LITE_AHB_CLK>,
+ <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
+ <&camcc CAM_CC_IFE_LITE_CSID_CLK>;
+ clock-names = "camnoc_axi",
+ "core_ahb",
+ "cpas_ahb",
+ "cpas_fast_ahb",
+ "cpas_vfe0",
+ "cpas_vfe1",
+ "cpas_vfe2",
+ "cpas_vfe_lite",
+ "csid",
+ "csiphy_rx",
+ "gcc_hf_axi",
+ "vfe0",
+ "vfe0_fast_ahb",
+ "vfe1",
+ "vfe1_fast_ahb",
+ "vfe2",
+ "vfe2_fast_ahb",
+ "vfe_lite",
+ "vfe_lite_ahb",
+ "vfe_lite_cphy_rx",
+ "vfe_lite_csid";
+
+ interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 640 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 359 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 641 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 360 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "csid0",
+ "csid1",
+ "csid2",
+ "csid_lite0",
+ "csid_lite1",
+ "vfe0",
+ "vfe1",
+ "vfe2",
+ "vfe_lite0",
+ "vfe_lite1";
+
+ interconnects = <&gem_noc MASTER_APPSS_PROC 0
+ &config_noc SLAVE_CAMERA_CFG 0>,
+ <&mmss_noc MASTER_CAMNOC_HF 0
+ &mc_virt SLAVE_EBI1 0>;
+ interconnect-names = "ahb",
+ "hf_mnoc";
+
+ iommus = <&apps_smmu 0x800 0x460>;
+
+ power-domains = <&camcc IFE_0_GDSC>,
+ <&camcc IFE_1_GDSC>,
+ <&camcc IFE_2_GDSC>,
+ <&camcc TITAN_TOP_GDSC>;
+ power-domain-names = "ife0", "ife1", "ife2", "top";
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+
+ camss_csiphy0_inep: endpoint {
+ remote-endpoint = <&csiphy0_out_ep>;
+ };
+ };
+
+ port at 1 {
+ reg = <1>;
+
+ camss_csiphy1_inep: endpoint {
+ remote-endpoint = <&csiphy1_out_ep>;
+ };
+ };
+
+ port at 2 {
+ reg = <2>;
+
+ camss_csiphy2_inep: endpoint {
+ remote-endpoint = <&csiphy2_out_ep>;
+ };
+ };
+
+ port at 3 {
+ reg = <3>;
+
+ camss_csiphy3_inep: endpoint {
+ remote-endpoint = <&csiphy3_out_ep>;
+ };
+ };
+
+ port at 4 {
+ reg = <4>;
+
+ camss_csiphy4_inep: endpoint {
+ remote-endpoint = <&csiphy4_out_ep>;
+ };
+ };
+
+ port at 5 {
+ reg = <5>;
+
+ camss_csiphy5_inep: endpoint {
+ remote-endpoint = <&csiphy5_out_ep>;
+ };
+ };
+ };
+ };
+
csiphy0: phy at ace4000 {
compatible = "qcom,sm8450-csi2-phy", "qcom,x1e80100-csi2-phy";
reg = <0 0x0ace4000 0 0x2000>;
@@ -3349,6 +3516,7 @@ port at 1 {
reg = <1>;
csiphy0_out_ep: endpoint {
+ remote-endpoint = <&camss_csiphy0_inep>;
};
};
};
@@ -3393,6 +3561,7 @@ port at 1 {
reg = <1>;
csiphy1_out_ep: endpoint {
+ remote-endpoint = <&camss_csiphy1_inep>;
};
};
};
@@ -3437,6 +3606,7 @@ port at 1 {
reg = <1>;
csiphy2_out_ep: endpoint {
+ remote-endpoint = <&camss_csiphy2_inep>;
};
};
};
@@ -3481,6 +3651,7 @@ port at 1 {
reg = <1>;
csiphy3_out_ep: endpoint {
+ remote-endpoint = <&camss_csiphy3_inep>;
};
};
};
@@ -3525,6 +3696,7 @@ port at 1 {
reg = <1>;
csiphy4_out_ep: endpoint {
+ remote-endpoint = <&camss_csiphy4_inep>;
};
};
};
@@ -3569,6 +3741,7 @@ port at 1 {
reg = <1>;
csiphy5_out_ep: endpoint {
+ remote-endpoint = <&camss_csiphy5_inep>;
};
};
};
--
2.51.0
More information about the linux-phy
mailing list