Hi Loic.
On 10/26/26 18:32, Loic Poulain wrote:
> On Fri, Oct 23, 2026 at 6:31 PM Vladimir Zapolskiy <vz at kernel.org> wrote:
>>
>> Add Qualcomm Waipio CAMSS device tree node to the platform dtsi file,
>> the CAMSS input ports are connected to output ports of CSIPHY devices.
>>
>> Signed-off-by: Vladimir Zapolskiy <vz at kernel.org>
>> ---
>> arch/arm64/boot/dts/qcom/sm8450.dtsi | 167 +++++++++++++++++++++++++++
>> 1 file changed, 167 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>> index babf1a4196a1..7f5b0501a23e 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>> @@ -3310,6 +3310,167 @@ cci1_i2c1: i2c-bus at 1 {
>> };
>> };
>>
>> + camss: isp at acb6000 {
>> + compatible = "qcom,waipio-camss";
>> + reg = <0 0xacb6000 0 0x1000>,
>> + <0 0xacb7000 0 0x1000>,
>> + <0 0xacb9000 0 0x1000>,
>> + <0 0xacbb000 0 0x1000>,
>> + <0 0xacc6000 0 0x1000>,
>> + <0 0xacca000 0 0x1000>,
>> + <0 0xacf6000 0 0x1000>,
>> + <0 0xacf7000 0 0x1000>,
>> + <0 0xacf8000 0 0x1000>,
>> + <0 0xac62000 0 0x3000>,
>> + <0 0xac71000 0 0x3000>,
>> + <0 0xac80000 0 0x3000>,
>> + <0 0xacc7000 0 0x2000>,
>> + <0 0xaccb000 0 0x2000>;
>> + reg-names = "csid_wrapper",
>> + "csid0",
>> + "csid1",
>> + "csid2",
>> + "csid_lite0",
>> + "csid_lite1",
>> + "tpg0",
>> + "tpg1",
>> + "tpg2",
>> + "vfe0",
>> + "vfe1",
>> + "vfe2",
>> + "vfe_lite0",
>> + "vfe_lite1";
>
> Is there a camss "top" register to describe here? e.g. to retrieve the
> CAMSS hardware version.
I'm not aware of anything like that. What is "CAMSS hardware version"?
CAMSS embraces various blocks, there are CSID and VFE, full and lite
IPs, and all these components do export their versions individually.
>> + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
>> + <&camcc CAM_CC_CORE_AHB_CLK>,
>> + <&camcc CAM_CC_CPAS_AHB_CLK>,
>> + <&camcc CAM_CC_CPAS_FAST_AHB_CLK>,
>> + <&camcc CAM_CC_CPAS_IFE_0_CLK>,
>> + <&camcc CAM_CC_CPAS_IFE_1_CLK>,
>> + <&camcc CAM_CC_CPAS_IFE_2_CLK>,
>> + <&camcc CAM_CC_CPAS_IFE_LITE_CLK>,
>> + <&camcc CAM_CC_CSID_CLK>,
>> + <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>,
>> + <&gcc GCC_CAMERA_HF_AXI_CLK>,
>> + <&camcc CAM_CC_IFE_0_CLK>,
>> + <&camcc CAM_CC_IFE_0_FAST_AHB_CLK>,
>> + <&camcc CAM_CC_IFE_1_CLK>,
>> + <&camcc CAM_CC_IFE_1_FAST_AHB_CLK>,
>> + <&camcc CAM_CC_IFE_2_CLK>,
>> + <&camcc CAM_CC_IFE_2_FAST_AHB_CLK>,
>> + <&camcc CAM_CC_IFE_LITE_CLK>,
>> + <&camcc CAM_CC_IFE_LITE_AHB_CLK>,
>> + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
>> + <&camcc CAM_CC_IFE_LITE_CSID_CLK>;
>> + clock-names = "camnoc_axi",
>> + "core_ahb",
>> + "cpas_ahb",
>> + "cpas_fast_ahb",
>> + "cpas_vfe0",
>> + "cpas_vfe1",
>> + "cpas_vfe2",
>> + "cpas_vfe_lite",
>> + "csid",
>> + "csiphy_rx",
>> + "gcc_hf_axi",
>> + "vfe0",
>> + "vfe0_fast_ahb",
>> + "vfe1",
>> + "vfe1_fast_ahb",
>> + "vfe2",
>> + "vfe2_fast_ahb",
>> + "vfe_lite",
>> + "vfe_lite_ahb",
>> + "vfe_lite_cphy_rx",
>> + "vfe_lite_csid";
>> + interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>,
>> + <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
>> + <GIC_SPI 640 IRQ_TYPE_EDGE_RISING>,
>> + <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>,
>> + <GIC_SPI 359 IRQ_TYPE_EDGE_RISING>,
>> + <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
>> + <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
>> + <GIC_SPI 641 IRQ_TYPE_EDGE_RISING>,
>> + <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>,
>> + <GIC_SPI 360 IRQ_TYPE_EDGE_RISING>;
>> + interrupt-names = "csid0",
>> + "csid1",
>> + "csid2",
>> + "csid_lite0",
>> + "csid_lite1",
>> + "vfe0",
>> + "vfe1",
>> + "vfe2",
>> + "vfe_lite0",
>> + "vfe_lite1";
>> + interconnects = <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_CAMERA_CFG 0>,
>> + <&mmss_noc MASTER_CAMNOC_HF 0 &mc_virt SLAVE_EBI1 0>;
>> + interconnect-names = "ahb",
>> + "hf_mnoc";
>> + iommus = <&apps_smmu 0x800 0x460>;
>> + power-domains = <&camcc IFE_0_GDSC>,
>> + <&camcc IFE_1_GDSC>,
>> + <&camcc IFE_2_GDSC>,
>> + <&camcc TITAN_TOP_GDSC>;
>> + power-domain-names = "ife0",
>> + "ife1",
>> + "ife2",
>> + "top";
>> + status = "disabled";
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port at 0 {
>> + reg = <0>;
>> +
>> + camss_csiphy0_inep: endpoint {
>> + remote-endpoint = <&csiphy0_out_ep>;
>> + };
>> + };
>> +
>> + port at 1 {
>> + reg = <1>;
>> +
>> + camss_csiphy1_inep: endpoint {
>> + remote-endpoint = <&csiphy1_out_ep>;
>> + };
>> + };
>> +
>> + port at 2 {
>> + reg = <2>;
>> +
>> + camss_csiphy2_inep: endpoint {
>> + remote-endpoint = <&csiphy2_out_ep>;
>> + };
>> + };
>> +
>> + port at 3 {
>> + reg = <3>;
>> +
>> + camss_csiphy3_inep: endpoint {
>> + remote-endpoint = <&csiphy3_out_ep>;
>> + };
>> + };
>> +
>> + port at 4 {
>> + reg = <4>;
>> +
>> + camss_csiphy4_inep: endpoint {
>> + remote-endpoint = <&csiphy4_out_ep>;
>> + };
>> + };
>> +
>> + port at 5 {
>> + reg = <5>;
>> +
>> + camss_csiphy5_inep: endpoint {
>> + remote-endpoint = <&csiphy5_out_ep>;
>> + };
>> + };
>> + };
>> + };
>> +
>> csiphy0: phy at ace4000 {
>> compatible = "qcom,waipio-csi2-phy", "qcom,x1e80100-csi2-phy";
>> reg = <0 0x0ace4000 0 0x2000>;
>> @@ -3349,6 +3510,7 @@ port at 1 {
>> reg = <1>;
>>
>> csiphy0_out_ep: endpoint {
>> + remote-endpoint = <&camss_csiphy0_inep>;
>> };
>> };
>> };
>> @@ -3393,6 +3555,7 @@ port at 1 {
>> reg = <1>;
>>
>> csiphy1_out_ep: endpoint {
>> + remote-endpoint = <&camss_csiphy1_inep>;
>> };
>> };
>> };
>> @@ -3437,6 +3600,7 @@ port at 1 {
>> reg = <1>;
>>
>> csiphy2_out_ep: endpoint {
>> + remote-endpoint = <&camss_csiphy2_inep>;
>> };
>> };
>> };
>> @@ -3481,6 +3645,7 @@ port at 1 {
>> reg = <1>;
>>
>> csiphy3_out_ep: endpoint {
>> + remote-endpoint = <&camss_csiphy3_inep>;
>> };
>> };
>> };
>> @@ -3525,6 +3690,7 @@ port at 1 {
>> reg = <1>;
>>
>> csiphy4_out_ep: endpoint {
>> + remote-endpoint = <&camss_csiphy4_inep>;
>> };
>> };
>> };
>> @@ -3569,6 +3735,7 @@ port at 1 {
>> reg = <1>;
>>
>> csiphy5_out_ep: endpoint {
>> + remote-endpoint = <&camss_csiphy5_inep>;
>> };
>> };
>> };
>> --
>> 2.53.0
>>
--
Best wishes,
Vladimir