[PATCH v3 6/6] ARM: dts: broadcom: Enable SATA on BCM958625HR
Florian Fainelli
florian.fainelli at broadcom.com
Mon Oct 26 12:16:18 PDT 2026
Commit 77416ab35f57 ("ARM: dts: NSP: Disable AHCI controller for HR NSP
boards") disabled AHCI after reports of boot hangs. Both SATA PHYs
remain enabled, but the disabled controller leaves the eSATA ports
unavailable.
With explicit IDM clock/reset setup and the corrected shared PHY
register aperture in place, enable the controller on BCM958625HR.
Signed-off-by: Florian Fainelli <florian.fainelli at broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm958625hr.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/broadcom/bcm958625hr.dts b/arch/arm/boot/dts/broadcom/bcm958625hr.dts
index 53acae385822..f6717ca76aef 100644
--- a/arch/arm/boot/dts/broadcom/bcm958625hr.dts
+++ b/arch/arm/boot/dts/broadcom/bcm958625hr.dts
@@ -184,6 +184,7 @@ partition at 700000 {
&sata {
/delete-property/ dma-coherent;
+ status = "okay";
};
&sata_phy0 {
--
2.53.0
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