[PATCH v3 0/6] phy: qcom-mipi-csi2: C-PHY for X1E80100

[Anusha Arun Nandi]

Hi George,

Sounds good. I will release the next version of patchset which will
include the best versions of Nihal's series and mine after careful
selection.

On 10/17/2026 12:04 AM, George Neacsu wrote:
> Hi Anusha,
> 
> On 17/10/2026 05:31, Anusha Arun Nandi wrote:
>> In our series we split C-PHY hw-ops into a dedicated
>> phy-qcom-mipi-csi2-3ph-cphy.c (mirroring the existing -3ph-dphy.c
>> split)
> 
> Thanks, I had missed your July series. Your three series cover what
> this one does and more: the generic C-PHY API in its own
> phy-core-mipi-cphy.c like the D-PHY one, the C-PHY ops in their own
> file, two SoCs, and the CAMSS side including David's patches. The split
> makes sense to me, and two versions of PHY_MODE_MIPI_CPHY should not
> both go in.
> 
> So I would rather build on yours than send a v4 of this series. I will
> send the X1E80100 sequence as one patch adding it to
> phy-qcom-mipi-csi2-3ph-cphy.c on top of your series, and test the whole
> stack on the Surface Pro 11 (IMX681 on CSIPHY2, one trio at
> 2.4 Gsym/s), with Tested-by on your patches if it works.
> 
> Review of this series raised a few points that I will check against
> your patches and comment on there:
> - the settle count computed from the timer clock rate instead of a
>   fixed table value (Nihal);
> - a u64 symbol rate, so 32-bit can hold rates above 4.29 Gsym/s;
> - trios instead of lanes in the C-PHY options (Loic).
> 
> Also, Vinod and linux-phy are not on Cc for your PHY series.
> 
Thank you for the heads-up!> Bryan, Vinod: unless you would rather take
this series, I will follow
> Anusha's.
> 
> Thanks,
> George

Best Regards,
Anusha