[PATCH 0/3] phy: aspeed: Add ASPEED PCIe PHY support

Krzysztof Kozlowski krzk at kernel.org
Fri Oct 9 03:32:44 PDT 2026


On Thu, Oct 08, 2026 at 07:28:18PM +0800, Jacky Chou wrote:
> Add the ASPEED PCIe PHY binding and driver for AST2600 and AST2700
> SoCs. The PHY provides the physical layer used by the PCIe controller
> when it is configured to run in root complex mode.
> 
> The driver registers an ASPEED PCIe PHY provider through the generic PHY
> framework and programs the SoC-specific PEHR registers from set_mode().
> For AST2600 this selects the root complex port type. For AST2700 this
> also configures the posted/completion credit values, local scaling,
> device type, internal reset selection, and downstream port setting
> needed by the controller.
> 
> This series also adds the devicetree binding for the PHY provider and a
> MAINTAINERS entry for the ASPEED PCIe PHY driver.
> 
> Signed-off-by: Jacky Chou <jacky_chou at aspeedtech.com>
> ---
> Jacky Chou (3):
>       dt-bindings: phy: aspeed: Add ASPEED PCIe PHY
>       phy: aspeed: Add ASPEED PCIe PHY driver
>       MAINTAINERS: Add ASPEED PCIe PHY driver

And changelog plus versioning are completely missing.

People sometimes wonder why maintainers are grumpy. Easy answer: you
do not respect their time.

Best regards,
Krzysztof




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