[PATCH v3] phy: rockchip: snps-pcie3: Raise the SRAM init timeout

[Manivannan Sadhasivam]

On 2026-10-18 09:13 +0800, Shawn Lin wrote:
> The SRAM initialization of the PCIe3 PHY may take longer than the 500us
> currently allowed, especially on a slow power-up such as at low
> temperature. In that case the driver reports
> 
>   lock failed 0x..., check input refclk and power supply
> 
> even though the input refclk and power supply are fine.
> 
> Raise the timeout to 20ms and use a named constant for it, applied to
> both the RK3568 and RK3588 paths.
> 
> A non-zero sleep interval (1ms) is passed to the polling helpers so the
> CPU is yielded between reads. With sleep_us == 0 the helpers tight-loop,
> which would otherwise burn the CPU during the now much longer wait.
> 
> Signed-off-by: Shawn Lin <shawn.lin at rock-chips.com>

Missing Fixes tag. With that added,

- Mani