[PATCH] phy: rockchip: naneng-combphy: Fix overwritten PLL SSC control bit

[Manivannan Sadhasivam]

On 2026-10-15 11:59 +0800, Shawn Lin wrote:
> rk_combphy_common_cfg_ssc() first sets RK3568_PHYREG33_PLL_SSC_CTRL on the
> RK3588 and RK3576 SoCs, then, for PCIe at 24MHz, programs the PLL KVCO
> adjust field. The latter used a plain writel() of the FIELD_PREP() value,
> which cleared all the other bits of RK3568_PHYREG33, including the
> PLL_SSC_CTRL bit that had just been set a few lines above.
> 
> Use rockchip_combphy_updatel() so that only the KVCO field is updated and
> the SSC control bit is preserved, as the comment and the pre-consolidation
> code intended.
> 
> Fixes: 0b31f297557f ("phy: rockchip: naneng-combphy: Consolidate SSC configuration")
> Signed-off-by: Shawn Lin <shawn.lin at rock-chips.com>

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam at oss.qualcomm.com>

- Mani