[PATCH v2 phy-next 2/2] phy: ti: add PHY driver for TI DS125DF111 Dual-Channel Retimer

[sashiko-bot at kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Missing delay or polling after setting a self-clearing hardware reset bit.
--

commit 59a5ca7411308a81c146d660b8c04e0be8fe8fbb
Author: Ioana Ciornei <ioana.ciornei at nxp.com>

phy: ti: add PHY driver for TI DS125DF111 Dual-Channel Retimer

This commit adds a generic PHY driver for the TI DS125DF111 Multi-Protocol
Dual-Channel Retimer. It supports 10G and 1G link speeds, modeling each of
the two channels as a separate PHY device.

> diff --git a/drivers/phy/ti/phy-ds125df111.c b/drivers/phy/ti/phy-ds125df111.c
> new file mode 100644
> --- /dev/null
> +++ b/drivers/phy/ti/phy-ds125df111.c

[ ... ]

> +static int ds125df111_configure(struct phy *phy,
> +				const struct ds125df111_config *cfg)
> +{

[ ... ]

> +	/* Reset Channel Registers */
> +	err = i2c_smbus_read_byte_data(i2c, DS125DF111_CH_CTRL);
> +	if (err < 0) {
> +		dev_err(dev, "Error resetting channel configuration\n");
> +		goto out;
> +	}
> +	val = (u8)err;
> +	val |= DS125DF111_CH_CTRL_RESET;
> +	err = i2c_smbus_write_byte_data(i2c, DS125DF111_CH_CTRL, val);
> +	if (err < 0) {
> +		dev_err(dev, "Error resetting channel configuration\n");
> +		goto out;
> +	}
> +
> +	/* Program the VCO group frequencies */
> +	for (i = 0; i < DS125DF111_NUM_VCO_GROUP_REG; i++) {
> +		err = i2c_smbus_write_byte_data(i2c,
> +						DS125DF111_VCO_GROUP_BASE + i,
> +						cfg->vco_group[i]);

Is a delay or polling loop needed after triggering the channel reset?

The DS125DF111_CH_CTRL_RESET bit is defined as self-clearing, but the code 
immediately proceeds to program the VCO group frequencies without checking if
the reset has finished.

Since hardware resets usually take a non-zero amount of time, writing to the
registers right away could result in the device NACKing the transactions or
silently dropping the new configuration.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260515110145.1925579-1-ioana.ciornei@nxp.com?part=2