[PATCH 0/2] Add support for the QMP PCIe PHYs in Qualcomm IPQ9650

[Kathiravan Thirumoorthy]

On 6/11/2026 4:45 PM, Vinod Koul wrote:
> On 02-06-26, 14:40, Kathiravan Thirumoorthy wrote:
>> Qualcomm's IPQ9650 SoC has 3 Gen3 dual lane and 2 Gen3 single lane
>> controllers with the QMP PHYs. Unlike the PHYs in the other IPQ SoC,
>> refgen supply is needed to bringup the PHYs. Both single and dual lane
>> shares the same HW init sequence. So reuse the tables.
>>
>> Document the compatible along with refgen supply and add the phy driver
>> support for it.
> Please rebase this on phy-next tomorrow. It does not apply for me due to
> changes applied ealier today

There is a discussion open about the supplies[1]. Once that is 
clarified, let me re spin. So we can take up this series for v7.3 once 
that discussion is closed.

[1] 
https://lore.kernel.org/linux-arm-msm/aiqYtowP2DQt7Jw0@vaman/T/#m37a571fac0c77fd00f6379ad9a2414b60431820b

>