[PATCH v5 phy-next 11/16] phy: lynx-28g: add support for big endian register maps

[Ioana Ciornei]

On Wed, Jun 10, 2026 at 06:19:47PM +0300, Vladimir Oltean wrote:
> Some 10G Lynx SerDes blocks are big endian and require byte swapping
> because the CPUs are little endian armv8 (LS1046A). Parse the
> "big-endian" device tree property, and modify the base lynx_read() and
> lynx_write() accessors to test this property before issuing either the
> ioread32() or ioread32be() variants (as per
> Documentation/driver-api/device-io.rst).
> 
> All other accessors - lynx_rmw(), lynx_lane_read(), lynx_lane_write(),
> lynx_lane_rmw(), lynx_pll_read() - need to go through these endian-aware
> helpers.
> 
> Signed-off-by: Vladimir Oltean <vladimir.oltean at nxp.com>

Reviewed-by: Ioana Ciornei <ioana.ciornei at nxp.com>