[PATCH 1/2] dt-bindings: phy: qcom,usb-hs-phy: add qcom,vendor-init-seq

[Dmitry Baryshkov]

On Wed, Jun 03, 2026 at 06:09:18PM +0200, me at herrie.org wrote:
> On 2026-06-03 15:57, Dmitry Baryshkov wrote:
> > On Wed, Jun 03, 2026 at 07:48:08AM +0200, Herman van Hazendonk wrote:
> > > Add an optional "qcom,vendor-init-seq" property carrying raw ULPI
> > > (address, value) pairs that are written after PHY reset.
> > > 
> > > Unlike the existing "qcom,init-seq" property, the address field is
> > > NOT offset by ULPI_EXT_VENDOR_SPECIFIC, so the new property can
> > > reach the standard ULPI vendor register range (0x30-0x3f). MSM8x60-
> > > class hardware needs this range to programme pre-emphasis, HS driver
> > > slope and CDR auto-reset bits the legacy msm_otg driver used to set
> > > via platform data.
> > 
> > Are those register writes specific to the device or to the whole
> > platform? In the latter case please extend the driver to write them.
> 
> Looking at every MSM8x60 reference kernel I could find (Qualcomm's own
> msm8x60 board, HP TouchPad / APQ8060, and some HTC/Saumsung MSM8660
> devices), the writes split into two groups:
> 
> Platform-level (same across all MSM8x60 hardware):
>  - reg 0x36 bits 1+2: CDR auto-reset disabled, SE1 gating disabled
>  - reg 0x32 bits [5:4]: pre-emphasis at 20%
> 
> Board-specific:
>  - reg 0x32 bits [3:0]: HS driver slope — HP TouchPad uses 5, HTC
>    devices use 1. This clearly depends on board layout (trace length,
>    connector loading, etc.).
> 
> So the platform-level writes should move unconditionally into the driver
> behind a match-data flag for the MSM8x60-class compatible, and only the
> HS driver slope value belongs in DT.

Looks like it. Please hardcode the value for your platform in the driver
(with the comment), meanwhile we can try looking up the actual values.

> 
> > If you have questions regarding any of the bitfields, please ask here,
> > we can try finding the data for those.
> 
> One thing I haven't been able to nail down: every HTC MSM8660 board also
> writes 0x0C (bits 2 and 3) to ULPI register 0x31 via phy_init_seq, but
> the HP TouchPad webOS kernel never sets that register through its named
> platform fields — and USB works fine on the TouchPad without it. Do you
> know what those two bits in 0x31 control? If they are needed on CI 45nm
> PHY silicon but not on the APQ8060 PHY variant, I should probably leave
> them out of the driver and note why.
> 
> I don't have any technical documentation for the S3 SoC family, except for
> the legacy kernels (HP, Samsung, HTC) and a bunch of various HP TouchPad
> variants.

Again, please use the value for your current platform, add a note to the
commit message and to the code.


-- 
With best wishes
Dmitry