[PATCH v3 0/2] Add support for the QMP PCIe PHYs in Qualcomm IPQ9650

[Kathiravan Thirumoorthy]

On 7/10/2026 11:16 PM, Kathiravan Thirumoorthy wrote:
> Qualcomm's IPQ9650 SoC has 3 Gen3 dual lane and 2 Gen3 single lane
> controllers with the QMP PHYs. Unlike the PHYs in the other IPQ SoC,
> refgen supply is needed to bringup the PHYs. Both single and dual lane
> shares the same HW init sequence. So reuse the tables.
>
> Document the compatible along with refgen supply and add the phy driver
> support for it.
>
> Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy at oss.qualcomm.com>
> ---

Vinod, Gentle ping...

> Changes in v3:
> - Rebased on linux-next: next-20260710
> - Pick up R-b tag
> - Incorporate the link stability issue fix (QSERDES_V4_RX_RX_MODE_00_HIGH4
>    from 0x35 to 0x3a) recommended by the IP team.
> Changes in v2:
> - rebase on phy-next
> - pick up R-b tag
> - Link to v1:
>    https://lore.kernel.org/linux-arm-msm/20260602-ipq9650_pcie_phy-v1-0-d8c32a36dbd9@oss.qualcomm.com/
>
> To: Vinod Koul <vkoul at kernel.org>
> To: Neil Armstrong <neil.armstrong at linaro.org>
> To: Rob Herring <robh at kernel.org>
> To: Krzysztof Kozlowski <krzk+dt at kernel.org>
> To: Conor Dooley <conor+dt at kernel.org>
> Cc: linux-arm-msm at vger.kernel.org
> Cc: linux-phy at lists.infradead.org
> Cc: devicetree at vger.kernel.org
> Cc: linux-kernel at vger.kernel.org
>
> ---
> Kathiravan Thirumoorthy (2):
>        dt-bindings: phy: qcom,ipq8074-qmp-pcie: document IPQ9650 QMP PCIe PHYs
>        phy: qcom: qmp-pcie: Add IPQ9650 PCIe PHY support
>
>   .../bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml    |  19 ++
>   drivers/phy/qualcomm/phy-qcom-qmp-pcie.c           | 220 +++++++++++++++++++++
>   2 files changed, 239 insertions(+)
> ---
> base-commit: bee763d5f341b99cf472afeb508d4988f62a6ca1
> change-id: 20260521-ipq9650_pcie_phy-60d7df32581c
>
> Best regards,
> --
> Kathiravan Thirumoorthy <kathiravan.thirumoorthy at oss.qualcomm.com>
>