[PATCH v4 2/8] phy: rockchip: samsung-hdptx: Prevent divide-by-zero when computing clk rate

Cristian Ciocaltea cristian.ciocaltea at collabora.com
Mon Jul 20 11:36:24 PDT 2026


Hi Dmitry,

Thanks a lot for taking the time to review the series!

On 7/20/26 5:10 PM, Dmitry Baryshkov wrote:
> On Fri, Jun 12, 2026 at 03:18:52AM +0300, Cristian Ciocaltea wrote:
>> On 6/12/26 2:57 AM, sashiko-bot at kernel.org wrote:
>>> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
>>>
>>> Pre-existing issues:
>>> - [High] Potential integer underflow in `fout` calculation when hardware state is misconfigured, leading to a massive bogus clock rate that could hang downstream components.
>>> --
>>
>> If the hardware reached such a damaged state, the kernel is likely already encountering more serious issues.
>>
>> Regardless, I will address this in the "FRL TxFFE level control" series, which is currently blocked by this one, to avoid any further delays.
>>
> 
> With the overflow handled:
> 
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov at oss.qualcomm.com>

Since a new revision is needed anyway, I'll add a new patch to handle this in
v5.

Regards,
Cristian



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