[PATCH v7 04/13] dt-bindings: clk: zte: Add zx297520v3 LSP clock and reset controller

Krzysztof Kozlowski krzk at kernel.org
Fri Jul 17 01:23:03 PDT 2026


On Fri, Jul 17, 2026 at 12:35:40AM +0300, Stefan Dösinger wrote:
> The clock controller of the zx297520v3 Low Speed Peripherals is
> relatively clean. One register per device with gates, muxes and resets
> and for some devices a divider. There are even bits in the matrix
> controller to control propagation of clock lines down to LSP.
> 
> The clocks are sorted by register address and I am convinced that the
> device list is complete. There are however a few more registers that are
> likely extra dividers for TDM and I2S devices
> 
> Signed-off-by: Stefan Dösinger <stefandoesinger at gmail.com>
> 
> ---

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski at oss.qualcomm.com>

Best regards,
Krzysztof




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