[RFC PATCH 04/10] dt-bindings: net: pcs: add rockchip,rk3568-xpcs binding

sashiko-bot at kernel.org sashiko-bot at kernel.org
Wed Jul 15 12:14:50 PDT 2026


Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Low] The device tree example uses a 64-bit `reg` format that fails `dt_binding_check` validation due to a mismatch with the default `#address-cells`.
- [Low] The device tree example fails to include the header for `PHY_TYPE_SGMII`, causing a compilation error during `dt_binding_check`.
--

--- Patch [4]: [RFC PATCH 04/10] dt-bindings: net: pcs: add rockchip,rk3568-xpcs binding ---
commit 2d8d4cd3ced5ab201d6610a9b6b870ceb6ceaed5
Author: Coia Prant <coiaprant at gmail.com>

dt-bindings: net: pcs: add rockchip,rk3568-xpcs binding

This commit adds device tree binding documentation for the Synopsys DesignWare
XPCS integrated on the Rockchip RK3568 SoC, supporting 1000BASE-X, SGMII,
and QSGMII modes with four MII ports.

> diff --git a/Documentation/devicetree/bindings/net/pcs/rockchip-dwxpcs.yaml b/Documentation/devicetree/bindings/net/pcs/rockchip-dwxpcs.yaml
> new file mode 100644
> index 0000000000000..14fadf67c793a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/pcs/rockchip-dwxpcs.yaml

[ ... ]

> +examples:
> +  - |
> +    #include <dt-bindings/clock/rk3568-cru.h>
> +    #include <dt-bindings/power/rk3568-power.h>
> +
> +    pcs at fda00000 {
> +      compatible = "rockchip,rk3568-xpcs";
> +      #address-cells = <1>;
> +      #size-cells = <0>;
> +      reg = <0x0 0xfda00000 0x0 0x200000>;

[Severity: Low]
Does this 64-bit register format fail dt_binding_check validation?

The example is extracted into a dummy root node with default
#address-cells = <1> and #size-cells = <1>. This means the 4 cells here will
be parsed as two items, which violates the maxItems: 1 constraint defined
in the schema for the reg property.

> +      clocks = <&cru PCLK_XPCS>, <&cru CLK_XPCS_EEE>;
> +      clock-names = "csr", "eee";
> +      phys = <&combphy2 PHY_TYPE_SGMII>;

[Severity: Low]
Will this fail to compile during dt_binding_check?

The example uses the PHY_TYPE_SGMII macro, but the required
<dt-bindings/phy/phy.h> header isn't included in the example.

> +      phy-names = "serdes";
> +      power-domains = <&power RK3568_PD_PIPE>;
> +
> +      pcs-mii at 0 {
> +        reg = <0>;
> +      };
> +    };

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260714191341.690906-1-coiaprant@gmail.com?part=4



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