[PATCH v4 3/4] phy: qcom-qmp: Add v10.60 register offsets

Dmitry Baryshkov dmitry.baryshkov at oss.qualcomm.com
Wed Jul 8 06:11:15 PDT 2026


On Tue, Jul 07, 2026 at 08:32:48PM +0000, Matthew Leung wrote:
> Hawi SoC uses v10.60 register definitions for PCIe Gen4 x1. Add the new
> register offset headers for all four sub-blocks:
> 
>  - QSERDES-COM offsets
>  - QSERDES TX/RX offsets
>  - PCS offsets
>  - PCS PCIe-specific offsets
> 
> Signed-off-by: Matthew Leung <matthew.leung at oss.qualcomm.com>
> ---
>  drivers/phy/qualcomm/phy-qcom-qmp-pcie.c           |   1 +
>  .../phy/qualcomm/phy-qcom-qmp-pcs-pcie-v10_60.h    |  26 +++++
>  drivers/phy/qualcomm/phy-qcom-qmp-pcs-v10_60.h     |  23 +++++
>  .../phy/qualcomm/phy-qcom-qmp-qserdes-com-v10_60.h |  55 +++++++++++
>  .../qualcomm/phy-qcom-qmp-qserdes-txrx-v10_60.h    | 109 +++++++++++++++++++++
>  drivers/phy/qualcomm/phy-qcom-qmp.h                |   5 +
>  6 files changed, 219 insertions(+)
> 

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov at oss.qualcomm.com>


-- 
With best wishes
Dmitry



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