(subset) [PATCH v3 0/4] PCI: qcom: Add support for Glymur PCIe Gen5x4
Manivannan Sadhasivam
manivannan.sadhasivam at oss.qualcomm.com
Fri Jan 16 05:25:28 PST 2026
On Mon, 25 Aug 2025 23:01:46 -0700, Wenbin Yao wrote:
> Glymur is the next generation compute SoC of Qualcomm. This patch series
> aims to add support for the fifth PCIe instance on it. The fifth PCIe
> instance on Glymur has a Gen5 4-lane PHY. Patch [1/4] documents PHY as a
> separate compatible and Patch [2/4] documents controller as a separate
> compatible. Patch [3/4] describles the new PCS offsets in a dedicated
> header file. Patch [4/4] adds configuration and compatible for PHY.
>
> [...]
Applied, thanks!
[2/4] dt-bindings: PCI: qcom: Document the Glymur PCIe Controller
commit: e74887035fba99ead63235740908debeb1326dad
Best regards,
--
Manivannan Sadhasivam <mani at kernel.org>
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