[PATCH v2] phy: fsl-imx8mq-usb: add debugfs to access control register

[Xu Yang]

On Wed, Dec 24, 2025 at 02:51:11PM +0100, Andrew Lunn wrote:
> On Wed, Dec 24, 2025 at 07:17:16PM +0800, Xu Yang wrote:
> > The CR port is a simple 16-bit data/address parallel port that is
> > provided for on-chip access to the control registers inside the
> > USB 3.0 femtoPHY. While access to these registers is not required
> > for normal PHY operation, this interface enables you to access
> > some of the PHY’s diagnostic features during normal operation or
> > to override some basic PHY control signals.
> > 
> > 3 debugfs files are created to read and write control registers,
> > all use hexadecimal format:
> > ctrl_reg_base: the register offset to write, or the start offset
> >                to read.
> > ctrl_reg_count: how many continuous registers to be read.
> > ctrl_reg_value: read to show the continuous registers value from
> >                 the offset in ctrl_reg_base, to ctrl_reg_base
> >                 + ctrl_reg_count - 1, one line for one register.
> >                 when write, override the register at ctrl_reg_base,
> >                 one time can only change one 16bits register.
> 
> Are the registers openly documented somewhere? Could you include a
> link in the commit message.

We integrate a SNPS PHY in Soc. So the registers are documented
in SNPS doc. Anyway, I can add a link for reference.

Thanks,
Xu Yang