[PATCH v4 09/25] scsi: ufs: mediatek: Rework the crypt-boost stuff

Nicolas Frattaroli nicolas.frattaroli at collabora.com
Mon Jan 5 00:05:14 PST 2026


On Wednesday, 24 December 2025 07:16:34 Central European Standard Time Peter Wang (王信友) wrote:
> On Thu, 2025-12-18 at 13:54 +0100, Nicolas Frattaroli wrote:
> > -
> > -static void ufs_mtk_init_boost_crypt(struct ufs_hba *hba)
> > +static int ufs_mtk_init_boost_crypt(struct ufs_hba *hba)
> > 
> 
> Hi Nicolas,
> 
> Please do not change the return type if you are not checking the return
> value.
> 
> 
> >  {
> >         struct ufs_mtk_host *host = ufshcd_get_variant(hba);
> >         struct ufs_mtk_crypt_cfg *cfg;
> >         struct device *dev = hba->dev;
> > -       struct regulator *reg;
> > -       u32 volt;
> > +       int ret;
> > 
> > -       host->crypt = devm_kzalloc(dev, sizeof(*(host->crypt)),
> > -                                  GFP_KERNEL);
> > -       if (!host->crypt)
> > -               goto disable_caps;
> > +       cfg = devm_kzalloc(dev, sizeof(*cfg), GFP_KERNEL);
> > +       if (!cfg)
> > +               return -ENOMEM;
> > 
> > -       reg = devm_regulator_get_optional(dev, "dvfsrc-vcore");
> > -       if (IS_ERR(reg)) {
> > -               dev_info(dev, "failed to get dvfsrc-vcore: %ld",
> > -                        PTR_ERR(reg));
> > -               goto disable_caps;
> > +       cfg->reg_vcore = devm_regulator_get_optional(dev, "dvfsrc-
> > vcore");
> > +       if (IS_ERR(cfg->reg_vcore)) {
> > +               dev_err(dev, "Failed to get dvfsrc-vcore: %pe", cfg-
> > >reg_vcore);
> > 
> 
> Should free the cfg memory?

It's a devres alloc. It'll get freed on driver removal automatically.
Freeing it manually would be a double-free once the driver unloads.

> 
> > +               return PTR_ERR(cfg->reg_vcore);
> >         }
> > 
> > -       if (of_property_read_u32(dev->of_node, "boost-crypt-vcore-
> > min",
> > -                                &volt)) {
> > -               dev_info(dev, "failed to get boost-crypt-vcore-min");
> > -               goto disable_caps;
> > +       ret = of_property_read_u32(dev->of_node, "mediatek,boost-
> > crypt-vcore-min",
> > +                                  &cfg->vcore_volt);
> > +       if (ret) {
> > +               dev_err(dev, "Failed to get mediatek,boost-crypt-
> > vcore-min: %pe\n",
> > +                       ERR_PTR(ret));
> > +               return ret;
> >         }
> > 
> > -       cfg = host->crypt;
> > -       if (ufs_mtk_init_host_clk(hba, "crypt_mux",
> > -                                 &cfg->clk_crypt_mux))
> > -               goto disable_caps;
> > +       cfg->clk_crypt_mux = devm_clk_get(dev, "crypt_mux");
> > +       if (IS_ERR(cfg->clk_crypt_mux)) {
> > +               dev_err(dev, "Failed to get clock crypt_mux: %pe\n",
> > cfg->clk_crypt_mux);
> > +               return PTR_ERR(cfg->clk_crypt_mux);
> > +       }
> > 
> > -       if (ufs_mtk_init_host_clk(hba, "crypt_lp",
> > -                                 &cfg->clk_crypt_lp))
> > -               goto disable_caps;
> > +       cfg->clk_crypt_lp = devm_clk_get(dev, "crypt_lp");
> > +       if (IS_ERR(cfg->clk_crypt_lp)) {
> > +               dev_err(dev, "Failed to get clock crypt_lp: %pe\n",
> > cfg->clk_crypt_lp);
> > +               return PTR_ERR(cfg->clk_crypt_lp);
> > +       }
> > 
> > -       if (ufs_mtk_init_host_clk(hba, "crypt_perf",
> > -                                 &cfg->clk_crypt_perf))
> > -               goto disable_caps;
> > +       cfg->clk_crypt_perf = devm_clk_get(dev, "crypt_perf");
> > +       if (IS_ERR(cfg->clk_crypt_perf)) {
> > +               dev_err(dev, "Failed to get clock crypt_perf: %pe\n",
> > cfg->clk_crypt_perf);
> > +               return PTR_ERR(cfg->clk_crypt_perf);
> > +       }
> > 
> > -       cfg->reg_vcore = reg;
> > -       cfg->vcore_volt = volt;
> > +       host->crypt = cfg;
> >         host->caps |= UFS_MTK_CAP_BOOST_CRYPT_ENGINE;
> > 
> > -disable_caps:
> > -       return;
> > +       return 0;
> >  }
> > 
> >  static void ufs_mtk_init_host_caps(struct ufs_hba *hba)
> > 
> > --
> > 2.52.0
> > 
> 
> 







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