[PATCH 00/11] Describe PCIe/USB3.0 clock generator on R-Car Gen3

Marek Vasut marek.vasut+renesas at mailbox.org
Thu Jan 1 12:35:47 PST 2026


Describe the 9FGV0841 PCIe and USB3.0 clock generator present on various
R-Car Gen3 boards. The clock generator supplies 100 MHz differential clock
for PCIe ports, USB 3.0 PHY and SATA.

The series effectively has three parts, the first three patches are part 1,
which fills in the missing USB 3.0 PHY on R-Car E3 Ebisu and enables it,
thus aligning the Ebisu USB 3.0 support with the rest of the Gen3 boards.

The second part is description of PCIe root ports on R-Car Gen3 SoCs where
applicable, in this case that is H3/M3W/M3N/E3. The root port is used with
PCIe port power control to also control the PCIe port clock. This is needed
on Gen3 boards, because they often use separate clock output from the PCIe
clock generator 9FGV0841 to supply clock to the controller and to the PCIe
port.

The third part is enablement of the 9FGV0841 PCIe clock controller on the
R-Car Salvator-X/XS, ULCB and Ebisu boards. The boards use the PCIe clock
controller outputs in a slightly different manner, all use the outputs to
supply PCIe controllers and slots, as well as USB 3.0 SuperSpeed PHY. The
ULCB board also uses the 9FGV0841 to supply SATA IP, but this is not yet
described in DT, therefore it is also not part of this series.

Marek Vasut (11):
  dt-bindings: phy: renesas: usb3-phy: add r8a77990 support
  arm64: dts: renesas: r8a77990: Add USB 3.0 PHY and USB3S0 clock nodes
  arm64: dts: renesas: ebisu: Enable USB 3.0 PHY
  arm64: dts: renesas: r8a77951: Describe PCIe root ports
  arm64: dts: renesas: r8a77960: Describe PCIe root ports
  arm64: dts: renesas: r8a77961: Describe PCIe root ports
  arm64: dts: renesas: r8a77965: Describe PCIe root ports
  arm64: dts: renesas: r8a77990: Describe PCIe root port
  arm64: dts: renesas: salvator-common: Describe PCIe/USB3.0 clock
    generator
  arm64: dts: renesas: ulcb: ulcb-kf: Describe PCIe/USB3.0 clock
    generator
  arm64: dts: renesas: ebisu: Describe PCIe/USB3.0 clock generator

 .../bindings/phy/renesas,usb3-phy.yaml        |  1 +
 arch/arm64/boot/dts/renesas/ebisu.dtsi        | 43 +++++++++++++++++++
 arch/arm64/boot/dts/renesas/r8a77951.dtsi     | 20 +++++++++
 arch/arm64/boot/dts/renesas/r8a77960.dtsi     | 20 +++++++++
 arch/arm64/boot/dts/renesas/r8a77961.dtsi     | 20 +++++++++
 arch/arm64/boot/dts/renesas/r8a77965.dtsi     | 20 +++++++++
 arch/arm64/boot/dts/renesas/r8a77990.dtsi     | 29 +++++++++++++
 .../boot/dts/renesas/salvator-common.dtsi     | 26 +++++++++++
 arch/arm64/boot/dts/renesas/ulcb-kf.dtsi      | 21 +++++++++
 arch/arm64/boot/dts/renesas/ulcb.dtsi         | 13 ++++++
 10 files changed, 213 insertions(+)

---
Cc: Conor Dooley <conor+dt at kernel.org>
Cc: Geert Uytterhoeven <geert+renesas at glider.be>
Cc: Krzysztof Kozlowski <krzk+dt at kernel.org>
Cc: Magnus Damm <magnus.damm at gmail.com>
Cc: Neil Armstrong <neil.armstrong at linaro.org>
Cc: Rob Herring <robh at kernel.org>
Cc: Vinod Koul <vkoul at kernel.org>
Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh at renesas.com>
Cc: devicetree at vger.kernel.org
Cc: linux-phy at lists.infradead.org
Cc: linux-renesas-soc at vger.kernel.org

-- 
2.51.0




More information about the linux-phy mailing list