[PATCH 08/16] arm64: dts: st: Add ucpd node on stm32mp251

[Marek Vasut]

On 8/21/26 6:23 PM, Fabrice Gasnier wrote:
> Describe UCPD bindings and nvmem cells to access trim values.
> This provides the PD and CC USB-C cable signaling functions.
> 
> Co-developed-by: Christian Bruel <christian.bruel at foss.st.com>
> Signed-off-by: Christian Bruel <christian.bruel at foss.st.com>
> Co-developed-by: Thomas Bourgoin <thomas.bourgoin at foss.st.com>
> Signed-off-by: Thomas Bourgoin <thomas.bourgoin at foss.st.com>
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier at foss.st.com>
> ---
>   arch/arm64/boot/dts/st/stm32mp251.dtsi | 51 ++++++++++++++++++++++++++++++++++
>   1 file changed, 51 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
> index 9dc7a05fce99..be54dd56713b 100644
> --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi

[...]

> @@ -1818,10 +1839,40 @@ part-number-otp at 24 {
>   				reg = <0x24 0x4>;
>   			};
>   
> +			ucpd_trim_3a_cc1: trim_3a_cc1 at 1bd,1 {
> +				reg = <0x1bd 0x1>;
> +				bits = <1 4>;
> +			};
> +
> +			ucpd_trim_3a_cc2: trim_3a_cc2 at 1bf,1 {
> +				reg = <0x1bf 0x1>;
> +				bits = <1 4>;
> +			};

These two fuse fields ^ do not seem to match STM32MP25xx documentation ?

RM0457 Rev 5
Table 876. UCPD software trim data
Page 5013

                Non-volatile memory location
Name                 Address       Bits
3A0_CC1[3:0]       0x5400 01E8     11:8
3A0_CC2[3:0]       0x5400 01E8     11:8
^^^^^^^                   ^^^^     ^^^^

>   			package-otp at 1e8 {
>   				reg = <0x1e8 0x1>;
>   				bits = <0 3>;
>   			};
[...]