[PATCH v2 01/14] dt-bindings: phy: Document the Qualcomm IPQ5332 UNIPHY USB Super-speed PHY

Krzysztof Kozlowski krzk at kernel.org
Thu Aug 13 03:48:59 PDT 2026


On 13/08/2026 12:28, George Moussalem wrote:
>>> +examples:
>>> +  - |
>>> +    #include <dt-bindings/clock/qcom,ipq5332-gcc.h>
>>> +
>>> +    phy at 4b0000 {
>>> +        compatible = "qcom,ipq5332-uniphy-usb-ss-phy";
>>> +        reg = <0x4b0000 0x800>;
>>
>> That is the same address as PCI PHY, so you have one device, not two.
> 
> yes, AFAIK they're separate PHYs (pcie-28lp vs usb-ss-22ull) sharing the
> same MMIO register space in IPQ5332. To enable USB3, the compatible
> string, clocks, resets, and related USB3 properties override the PCIe
> properties. In IPQ5018, the PHYs have different register address spaces,
> hence representing it as a new devicetree node.
> 

Same MMIO space is same device, IMO, especially that you have the same
registers (looking at the driver).

>>
>> Best regards,
>> Krzysztof
>>
> 
> Best regards,
> George
> 


Best regards,
Krzysztof



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