[PATCH V4 1/2] arm64: dts: qcom: Add SD Card support for Shikra SoC

[sashiko-bot at kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The `interrupts` property for the `sdhc_2` node specifies 3 cells per interrupt, but the interrupt parent requires 4 cells.
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--- Patch [1]: [PATCH V4 1/2] arm64: dts: qcom: Add SD Card support for Shikra SoC ---
commit 83ca6e70b2f615f092668ff7fd7effef71d8d1fa
Author: Monish Chunara <monish.chunara at oss.qualcomm.com>

arm64: dts: qcom: Add SD Card support for Shikra SoC

This commit adds device tree support for the SD card interface on the Shikra
SoC. It configures the sdhc_2 controller and provides the necessary pin
control, clocks, interconnects, and operating points.

> diff --git a/arch/arm64/boot/dts/qcom/shikra.dtsi b/arch/arm64/boot/dts/qcom/shikra.dtsi
> --- a/arch/arm64/boot/dts/qcom/shikra.dtsi
> +++ b/arch/arm64/boot/dts/qcom/shikra.dtsi

[ ... ]

> +		sdhc_2: mmc at 4784000 {
> +			compatible = "qcom,shikra-sdhci", "qcom,sdhci-msm-v5";
> +			reg = <0x0 0x04784000 0x0 0x1000>;
> +
> +			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;

[Severity: High]
Does this interrupts property provide enough cells for the interrupt parent?

If the interrupt parent for this SoC requires 4 cells (such as 
#interrupt-cells = <4>), parsing this 3-cell definition will fail during boot.

This could prevent the sdhci-msm driver from obtaining its interrupts, causing
a probe failure and leaving the SD card non-functional. Would it be correct
to add a 4th cell here, matching how sdhc_1 is configured?

> +			interrupt-names = "hc_irq",
> +					  "pwr_irq";

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260804122054.3462145-1-monish.chunara@oss.qualcomm.com?part=1