[PATCH v3 1/5] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Add support for glymur Gen5 x8 bifurcation mode

[Qiang Yu]

On Wed, Apr 22, 2026 at 08:27:02AM +0200, Krzysztof Kozlowski wrote:
> On 16/04/2026 04:58, Qiang Yu wrote:
> >>>    reset-names:
> >>>      minItems: 1
> >>>      items:
> >>>        - const: phy
> >>>        - const: phy_nocsr
> >>> +      - const: phy_b
> >>> +      - const: phy_b_nocsr
> >>
> >> And now I doubt that all the changes here are for duplicated node.
> >>
> > 
> > All the changes here are for 1x8 PHY node.
> > 
> >> Maybe just the commit msg is confusing and instead of describing some
> >> node which combines two other phys just say what device is here being
> >> described.
> >>
> > 
> > Okay, I will focus on describing the required resources. Is the
> > description below clearer?
> > 
> > Glymur has two physical Gen5x4 PCIe PHY blocks: pcie3a phy and pcie3b phy.
> 
> 
> I just proven you that it is not true.
>

Yeah, I see it. I have to say you are right. It is a 1x8 PHY. We can set
the phy-cell to 1 and controller driver use different args to determine it
requires 1x4_a, 1x4_b or 1x8.

- Qiang Yu

> Best regards,
> Krzysztof