[PATCH] phy: exynos5-usbdrd: fix USB 2.0 HS PHY tuning values for Exynos7870

Krzysztof Kozlowski krzk at kernel.org
Mon Apr 6 06:38:07 PDT 2026


On 06/04/2026 09:05, Łukasz Lebiedziński wrote:
> The existing PHYPARAM0 tuning values for Exynos7870 are incorrect,
> causing the USB 2.0 PHY to fail high-speed negotiation and fall back
> to full-speed (12Mbps) operation.
> 
> Fix TXVREFTUNE (transmitter voltage reference) from 14 to 3,
> TXRESTUNE (transmitter impedance) from 3 to 2, and SQRXTUNE
> (squelch threshold) from 6 to 5. Also explicitly set
> TXPREEMPPULSETUNE to 0, which was previously missing from the
> tuning table despite being included in the register mask.
> 
> All values are derived from the vendor kernel for the Samsung
> Galaxy A6 (SM-A600FN), as no public hardware documentation is
> available for the Exynos7870 USB DRD PHY. With these corrections,
> the PHY successfully negotiates high-speed (480Mbps) operation.
> 
> Fixes: 588d5d20ca8d ("phy: exynos5-usbdrd: add exynos7870 USBDRD support")
> Cc: stable at vger.kernel.org
> Tested-by: Łukasz Lebiedziński <kernel at lvkasz.us>

Drop you are the author. This is for 3rd party credits.

> Tested-by: Kaustabh Chakraborty <kauschluss at disroot.org>
> Signed-off-by: Łukasz Lebiedziński <kernel at lvkasz.us>
> ---
>  drivers/phy/samsung/phy-exynos5-usbdrd.c | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/phy/samsung/phy-exynos5-usbdrd.c b/drivers/phy/samsung/phy-exynos5-usbdrd.c
> index 5a181cb4597e..8711a3b62c8e 100644
> --- a/drivers/phy/samsung/phy-exynos5-usbdrd.c
> +++ b/drivers/phy/samsung/phy-exynos5-usbdrd.c
> @@ -1958,13 +1958,14 @@ const struct exynos5_usbdrd_phy_tuning exynos7870_tunes_utmi_postinit[] = {
>  			      PHYPARAM0_TXPREEMPAMPTUNE | PHYPARAM0_TXHSXVTUNE |
>  			      PHYPARAM0_TXFSLSTUNE | PHYPARAM0_SQRXTUNE |
>  			      PHYPARAM0_OTGTUNE | PHYPARAM0_COMPDISTUNE),
> -			     (FIELD_PREP_CONST(PHYPARAM0_TXVREFTUNE, 14) |
> +			     (FIELD_PREP_CONST(PHYPARAM0_TXVREFTUNE, 3) |
>  			      FIELD_PREP_CONST(PHYPARAM0_TXRISETUNE, 1) |
> -			      FIELD_PREP_CONST(PHYPARAM0_TXRESTUNE, 3) |
> +			      FIELD_PREP_CONST(PHYPARAM0_TXRESTUNE, 2) |
> +			      FIELD_PREP_CONST(PHYPARAM0_TXPREEMPPULSETUNE, 0) |
>  			      FIELD_PREP_CONST(PHYPARAM0_TXPREEMPAMPTUNE, 0) |
>  			      FIELD_PREP_CONST(PHYPARAM0_TXHSXVTUNE, 0) |
>  			      FIELD_PREP_CONST(PHYPARAM0_TXFSLSTUNE, 3) |
> -			      FIELD_PREP_CONST(PHYPARAM0_SQRXTUNE, 6) |
> +			      FIELD_PREP_CONST(PHYPARAM0_SQRXTUNE, 5) |
>  			      FIELD_PREP_CONST(PHYPARAM0_OTGTUNE, 2) |
>  			      FIELD_PREP_CONST(PHYPARAM0_COMPDISTUNE, 3))),

With tags corrected:

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski at oss.qualcomm.com>


Best regards,
Krzysztof



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