[PATCH 0/6] Add PCIe support for Kaanapali
Jingyi Wang
jingyi.wang at oss.qualcomm.com
Wed Sep 24 16:33:16 PDT 2025
Describe PCIe controller and PHY. Also add required system resources like
regulators, clocks, interrupts and registers configuration for PCIe.
Signed-off-by: Jingyi Wang <jingyi.wang at oss.qualcomm.com>
---
Qiang Yu (6):
dt-bindings: PCI: qcom,pcie-sm8550: Add Kaanapali compatible
dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Add Kaanapali compatible
phy: qcom-qmp: qserdes-txrx: Add QMP PCIe PHY v8-specific register offsets
phy: qcom-qmp: pcs-pcie: Add v8 register offsets
phy: qcom-qmp: qserdes-com: Add some more v8 register offsets
phy: qcom: qmp-pcie: add QMP PCIe PHY tables for Kaanapali
.../devicetree/bindings/pci/qcom,pcie-sm8550.yaml | 1 +
.../bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 3 +
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 194 +++++++++++++++++++++
drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v8.h | 35 ++++
drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v8.h | 11 ++
.../qualcomm/phy-qcom-qmp-qserdes-txrx-pcie-v8.h | 71 ++++++++
6 files changed, 315 insertions(+)
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base-commit: ae2d20002576d2893ecaff25db3d7ef9190ac0b6
change-id: 20250918-knp-pcie-cf080fccbb5e
Best regards,
--
Jingyi Wang <jingyi.wang at oss.qualcomm.com>
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