[PATCH v2 1/4] phy: rockchip: inno-usb2: Add usb2 phy support for RK3368

[Heiko Stübner]

Am Dienstag, 9. September 2025, 15:29:55 Mitteleuropäische Sommerzeit schrieb WeiHao Li:
> RK3368 has one USB2.0 PHY with two ports. This adds device specific data
> for it. Device specific data get form rockchip downstream source [1].
> 
> [1] https://github.com/rockchip-linux/kernel/blob/develop-4.4/drivers/phy/rockchip/phy-rockchip-inno-usb2.c#L2805
> 
> Signed-off-by: WeiHao Li <cn.liweihao at gmail.com>

compared the register values to the TRM

Reviewed-by: Heiko Stuebner <heiko at sntech.de>

> ---
>  drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 48 +++++++++++++++++++
>  1 file changed, 48 insertions(+)
> 
> diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> index b0f23690ec..df574337d4 100644
> --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> @@ -1847,6 +1847,53 @@ static const struct rockchip_usb2phy_cfg rk3366_phy_cfgs[] = {
>  	{ /* sentinel */ }
>  };
>  
> +static const struct rockchip_usb2phy_cfg rk3368_phy_cfgs[] = {
> +	{
> +		.reg = 0x700,
> +		.num_ports	= 2,
> +		.clkout_ctl	= { 0x0724, 15, 15, 1, 0 },
> +		.port_cfgs	= {
> +			[USB2PHY_PORT_OTG] = {
> +				.phy_sus	= { 0x0700, 8, 0, 0, 0x1d1 },
> +				.bvalid_det_en	= { 0x0680, 3, 3, 0, 1 },
> +				.bvalid_det_st	= { 0x0690, 3, 3, 0, 1 },
> +				.bvalid_det_clr = { 0x06a0, 3, 3, 0, 1 },
> +				.idfall_det_en	= { 0x0680, 6, 6, 0, 1 },
> +				.idfall_det_st	= { 0x0690, 6, 6, 0, 1 },
> +				.idfall_det_clr	= { 0x06a0, 6, 6, 0, 1 },
> +				.idrise_det_en	= { 0x0680, 5, 5, 0, 1 },
> +				.idrise_det_st	= { 0x0690, 5, 5, 0, 1 },
> +				.idrise_det_clr	= { 0x06a0, 5, 5, 0, 1 },
> +				.ls_det_en	= { 0x0680, 2, 2, 0, 1 },
> +				.ls_det_st	= { 0x0690, 2, 2, 0, 1 },
> +				.ls_det_clr	= { 0x06a0, 2, 2, 0, 1 },
> +				.utmi_bvalid	= { 0x04bc, 23, 23, 0, 1 },
> +				.utmi_id	= { 0x04bc, 26, 26, 0, 1 },
> +				.utmi_ls	= { 0x04bc, 25, 24, 0, 1 },
> +			},
> +			[USB2PHY_PORT_HOST] = {
> +				.phy_sus	= { 0x0728, 8, 0, 0, 0x1d1 },
> +				.ls_det_en	= { 0x0680, 4, 4, 0, 1 },
> +				.ls_det_st	= { 0x0690, 4, 4, 0, 1 },
> +				.ls_det_clr	= { 0x06a0, 4, 4, 0, 1 }
> +			}
> +		},
> +		.chg_det = {
> +			.opmode		= { 0x0700, 8, 0, 0, 0x1d7 },
> +			.cp_det		= { 0x04b8, 30, 30, 0, 1 },
> +			.dcp_det	= { 0x04b8, 29, 29, 0, 1 },
> +			.dp_det		= { 0x04b8, 31, 31, 0, 1 },
> +			.idm_sink_en	= { 0x0718, 8, 8, 0, 1 },
> +			.idp_sink_en	= { 0x0718, 7, 7, 0, 1 },
> +			.idp_src_en	= { 0x0718, 9, 9, 0, 1 },
> +			.rdm_pdwn_en	= { 0x0718, 10, 10, 0, 1 },
> +			.vdm_src_en	= { 0x0718, 12, 12, 0, 1 },
> +			.vdp_src_en	= { 0x0718, 11, 11, 0, 1 },
> +		},
> +	},
> +	{ /* sentinel */ }
> +};
> +
>  static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = {
>  	{
>  		.reg		= 0xe450,
> @@ -2289,6 +2336,7 @@ static const struct of_device_id rockchip_usb2phy_dt_match[] = {
>  	{ .compatible = "rockchip,rk3308-usb2phy", .data = &rk3308_phy_cfgs },
>  	{ .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
>  	{ .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
> +	{ .compatible = "rockchip,rk3368-usb2phy", .data = &rk3368_phy_cfgs },
>  	{ .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
>  	{ .compatible = "rockchip,rk3562-usb2phy", .data = &rk3562_phy_cfgs },
>  	{ .compatible = "rockchip,rk3568-usb2phy", .data = &rk3568_phy_cfgs },
>