[PATCH V2 2/2] phy: qcom-qmp-ufs: Add regulator loads for SM8550 and SM8750

[Konrad Dybcio]

On 8/18/25 2:41 PM, Nitin Rawat wrote:
> Add regulator load configuration for SM8550 and SM8750 UFS PHY.
> This ensure proper regulator load management and mode selection for
> optimal power efficiency on these SoC platforms where regulators may
> be shared with other IP blocks.
> 
> The load requirements are:
> 
> - SM8550: vdda-phy=205000uA, vdda-pll=17500uA
> - SM8750: vdda-phy=213000uA, vdda-pll=18300uA
> 
> Signed-off-by: Nitin Rawat <quic_nitirawa at quicinc.com>
> ---
>  drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
> index f7a4a8334026..50875d9609f6 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
> @@ -1172,6 +1172,17 @@ static const char * const qmp_phy_vreg_l[] = {
>  	"vdda-phy", "vdda-pll",
>  };
> 
> +/* Regulator load arrays for specific configurations */
> +static const int sm8650_vreg_load_ua[] = {
> +	205000, /* vdda-phy */
> +	17500,  /* vdda-pll */

Is one really supposed to be 10x higher? I mean, it may be, but
it looks odd..

Konrad