[PATCH v8 10/10] arm64: dts: rockchip: rk3399-evb-ind: Add support for DisplayPort

Chaoyi Chen kernel at airkyi.com
Wed Oct 29 19:16:45 PDT 2025


Hi Peter,

On 10/30/2025 9:34 AM, Peter Chen wrote:
> On Wed, Oct 29, 2025 at 6:32 PM Chaoyi Chen <chaoyi.chen at rock-chips.com> wrote:
>> On 10/29/2025 6:21 PM, Chaoyi Chen wrote:
>>
>>> Hi Peter,
>>>
>>> On 10/29/2025 5:45 PM, Peter Chen wrote:
>>>>> +&i2c4 {
>>>>> +       i2c-scl-rising-time-ns = <475>;
>>>>> +       i2c-scl-falling-time-ns = <26>;
>>>>> +       status = "okay";
>>>>> +
>>>>> +       usbc0: typec-portc at 22 {
>>>>> +               compatible = "fcs,fusb302";
>>>>> +               reg = <0x22>;
>>>>> +               interrupt-parent = <&gpio1>;
>>>>> +               interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
>>>>> +               pinctrl-names = "default";
>>>>> +               pinctrl-0 = <&usbc0_int>;
>>>>> +               vbus-supply = <&vbus_typec>;
>>>>> +
>>>>> +               usb_con: connector {
>>>>> +                       compatible = "usb-c-connector";
>>>>> +                       label = "USB-C";
>>>>> +                       data-role = "dual";
>>>>> +                       power-role = "dual";
>>>>> +                       try-power-role = "sink";
>>>>> +                       op-sink-microwatt = <1000000>;
>>>>> +                       sink-pdos =
>>>>> +                               <PDO_FIXED(5000, 2500, PDO_FIXED_USB_COMM)>;
>>>>> +                       source-pdos =
>>>>> +                               <PDO_FIXED(5000, 1500, PDO_FIXED_USB_COMM)>;
>>>>> +
>>>>> +                       altmodes {
>>>>> +                               displayport {
>>>>> +                                       svid = /bits/ 16 <0xff01>;
>>>>> +                                       vdo = <0x00001c46>;
>>>>> +                               };
>>>>> +                       };
>>>>> +
>>>>> +                       ports {
>>>>> +                               #address-cells = <1>;
>>>>> +                               #size-cells = <0>;
>>>>> +
>>>>> +                               port at 0 {
>>>>> +                                       reg = <0>;
>>>>> +
>>>>> +                                       usbc_hs: endpoint {
>>>>> + remote-endpoint = <&u2phy0_typec_hs>;
>>>>> +                                       };
>>>>> +                               };
>>>>> +
>>>> Why USB2 PHY needs to be notified for Type-C connection?
>>> I think the USB-connector binding require a port at 0 for High Speed.  So I filled in USB2 PHY here. And I have looked up boards with the same usage, and some of the results are as follows:
>>>
>>> - rk3399-firefly.dts
>>>
>>> - rk3399-pinebook-pro.dts
>>>
>>> - rk3399-eaidk-610.dts
>>>
> Okay.  My question is basic: USB2 PHY supplies DP/DM, and the DP/DM is
> short for Type-C connector,
> and no control is needed for Type-C application.
> Why is there a remote-endpoint connection between USB2 PHY and Type-C connector?

 From the perspective of Type-C, this should not be added.  Is the approach in v2 correct [0] ?

[0]: https://lore.kernel.org/all/20250715112456.101-6-kernel@airkyi.com/

Or is the following approach correct?


port at 0 {
     reg = <0>;

     usbc_hs: endpoint {
         remote-endpoint = <&tcphy0>;
     };
};

port at 1 {
     reg = <1>;

     usbc_ss: endpoint {
         remote-endpoint = <&tcphy0>;
     };
};

port at 2 {
     reg = <2>;

     usbc_dp: endpoint {
         remote-endpoint = <&tcphy0_typec_dp>;
     };
};


>
>>>>> +                               port at 1 {
>>>>> +                                       reg = <1>;
>>>>> +
>>>>> +                                       usbc_ss: endpoint {
>>>>> + remote-endpoint = <&tcphy0_typec_ss>;
>>>>> +                                       };
>>>>> +                               };
>>>>> +
>>>>> +                               port at 2 {
>>>>> +                                       reg = <2>;
>>>>> +
>>>>> +                                       usbc_dp: endpoint {
>>>>> + remote-endpoint = <&tcphy0_typec_dp>;
>>>>> +                                       };
>>>>> +                               };
>>>>> +                       };
>>>>> +               };
>>>>> +       };
>>>>> +};
>>>>> +
>>>> .....
>>>>>    &u2phy0 {
>>>>>           status = "okay";
>>>>> +
>>>>> +       port {
>>>>> +               u2phy0_typec_hs: endpoint {
>>>>> +                       remote-endpoint = <&usbc_hs>;
>>>>> +               };
>>>>> +       };
>>>>>    };
>>>>>
>>>> There is no switch and mux, how to co-work with Type-C?
>>> I checked the phy-rockchip-inno-usb2.c but did not find any switch or mux. Does this mean that we need to implement them? Thank you.
>> Wait a minute, actually we have multiple hardware interfaces, one of which is Type-C, eventually connected to USBDPPHY, and the other is micro-usb connected to U2PHY.
> I assume the Micro-USB connector does not use Type-C/PD IC, is it
> right? Does it relate to this patch?
>
> Best regards,
> Peter
>




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