[PATCH 12/15] arm64: dts: mediatek: mt7981b-openwrt-one: Enable Ethernet
Lucien.Jheng
lucienzx159 at gmail.com
Wed Oct 29 08:41:14 PDT 2025
Hi
Sjoerd Simons 於 2025/10/28 下午 09:24 寫道:
> On Tue, 2025-10-28 at 12:14 +0100, Eric Woudstra wrote:
>>
>> On 10/21/25 10:21 PM, Sjoerd Simons wrote:
>>> On Fri, 2025-10-17 at 19:31 +0200, Andrew Lunn wrote:
>>>>> +&mdio_bus {
>>>>> + phy15: ethernet-phy at f {
>>>>> + compatible = "ethernet-phy-id03a2.a411";
>>>>> + reg = <0xf>;
>>>>> + interrupt-parent = <&pio>;
>>>>> + interrupts = <38 IRQ_TYPE_EDGE_FALLING>;
>>>> This is probably wrong. PHY interrupts are generally level, not edge.
>>> Sadly i can't find a datasheet for the PHY, so can't really validate that
>>> easily. Maybe Eric can
>>> comment here as the author of the relevant PHY driver.
>>>
>>> I'd note that the mt7986a-bananapi-bpi-r3-mini dts has the same setup for
>>> this PHY, however that's
>>> ofcourse not authoritative.
>>>
>> Lucien would have access to the correct information about the interrupt.
> Thanks! For what it's worth i got around to putting a scope on the line last
> night. It looks like the interrupt line is pulled down until cleared, so it
> appears it's indeed a Level interrupt as Andrew guessed. But would be great to
> have this confirmed based on the documentation :)
The Airoha EN8811H Interrupt behavior is as follows:
When the line side link changes (up→ down or down → up), GPIO 8 will
output low.
After you clear the interrupt, GPIO 8 will go high. Regarding the
documentation, let me check where I can put it.
If you have any questions about the EN8811H, please feel free to discuss
with me.
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