[PATCH v2 3/6] phy: qcom-qmp: qserdes-txrx: Add complete QMP PCIe PHY v8 register offsets
Dmitry Baryshkov
dmitry.baryshkov at oss.qualcomm.com
Wed Oct 15 14:12:03 PDT 2025
On Wed, Oct 15, 2025 at 03:27:33AM -0700, Qiang Yu wrote:
> Kaanapali SoC uses QMP PHY with version v8 for PCIe Gen3 x2, but requires
> a completely unique qserdes-txrx register offsets compared to existing v8
> offsets.
>
> Hence, add a dedicated header file containing the FULL SET of qserdes-txrx
> register definitions required for Kaanapali's PCIe PHY operation.
>
> Signed-off-by: Jingyi Wang <jingyi.wang at oss.qualcomm.com>
> Signed-off-by: Qiang Yu <qiang.yu at oss.qualcomm.com>
> ---
> .../qualcomm/phy-qcom-qmp-qserdes-txrx-pcie-v8.h | 71 ++++++++++++++++++++++
> 1 file changed, 71 insertions(+)
>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov at oss.qualcomm.com>
--
With best wishes
Dmitry
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