[PATCH v2 0/6] Add PCIe support for Kaanapali
Qiang Yu
qiang.yu at oss.qualcomm.com
Wed Oct 15 03:27:30 PDT 2025
Describe PCIe controller and PHY. Also add required system resources like
regulators, clocks, interrupts and registers configuration for PCIe.
Changes in v2:
- Rewrite commit msg for PATCH[3/6]
- Keep keep pcs-pcie reigster definitions sorted.
- Add Reviewed-by tag.
- Keep qmp_pcie_of_match_table sorted.
- Link to v1: https://lore.kernel.org/all/20250924-knp-pcie-v1-0-5fb59e398b83@oss.qualcomm.com/
Signed-off-by: Qiang Yu <qiang.yu at oss.qualcomm.com>
---
Qiang Yu (6):
dt-bindings: PCI: qcom,pcie-sm8550: Add Kaanapali compatible
dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Add Kaanapali compatible
phy: qcom-qmp: qserdes-txrx: Add complete QMP PCIe PHY v8 register offsets
phy: qcom-qmp: pcs-pcie: Add v8 register offsets
phy: qcom-qmp: qserdes-com: Add some more v8 register offsets
phy: qcom: qmp-pcie: add QMP PCIe PHY tables for Kaanapali
.../devicetree/bindings/pci/qcom,pcie-sm8550.yaml | 1 +
.../bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 3 +
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 194 +++++++++++++++++++++
drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v8.h | 34 ++++
drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v8.h | 11 ++
.../qualcomm/phy-qcom-qmp-qserdes-txrx-pcie-v8.h | 71 ++++++++
6 files changed, 314 insertions(+)
---
base-commit: 13863a59e410cab46d26751941980dc8f088b9b3
change-id: 20251015-kaanapali-pcie-upstream-c11ce03cec8e
Best regards,
--
Qiang Yu <qiang.yu at oss.qualcomm.com>
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