[PATCH v5 2/3] phy: qcom: qmp-combo: get the USB3 & DisplayPort lanes mapping from DT
Neil Armstrong
neil.armstrong at linaro.org
Thu Oct 9 09:38:12 PDT 2025
On 10/9/25 16:51, Xilin Wu wrote:
> On 10/6/2025 9:55 PM, Neil Armstrong wrote:
>> The QMP USB3/DP Combo PHY hosts an USB3 phy and a DP PHY on top
>> of a combo glue to route either lanes to the 4 shared physical lanes.
>>
>> The routing of the lanes can be:
>> - 2 DP + 2 USB3
>> - 4 DP
>> - 2 USB3
>>
>> Get the lanes mapping from DT and stop registering the USB-C
>> muxes in favor of a static mode and orientation detemined
>> by the lanes mapping.
>>
>> This allows supporting boards with direct connection of USB3 and
>> DisplayPort lanes to the QMP Combo PHY lanes, not using the
>> USB-C Altmode feature.
>>
>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov at oss.qualcomm.com>
>> Signed-off-by: Neil Armstrong <neil.armstrong at linaro.org>
>> ---
>
> [...]
>> +static int qmp_combo_get_dt_lanes_mapping(struct device *dev, unsigned int endpoint,
>> + u32 *data_lanes, unsigned int max,
>> + unsigned int *count)
>> +{
>> + struct device_node *ep;
>> + int ret;
>> +
>> + ep = of_graph_get_endpoint_by_regs(dev->of_node, 0, endpoint);
>> + if (!ep)
>> + return -EINVAL;
>> +
>> + ret = of_property_count_u32_elems(ep, "data-lanes");
>> + if (ret < 0)
>> + goto err_node_put;
>> +
>> + *count = ret;
>> +
>> + ret = of_property_read_u32_array(ep, "data-lanes", data_lanes,
>> + max_t(unsigned int, *count, max));
>
> I think this should be min_t instead of max_t.
You're right, thanks for noticing !
>
> With this fixed,
>
> Tested-by: Xilin Wu <sophon at radxa.com> # qcs6490-radxa-dragon-q6a
>
Thanks,
Neil
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