[PATCH] phy: exynos5-usbdrd: fix clock prepare imbalance

[Peter Griffin]

On Mon, 6 Oct 2025 at 09:07, André Draszik <andre.draszik at linaro.org> wrote:
>
> Commit f4fb9c4d7f94 ("phy: exynos5-usbdrd: allow DWC3 runtime suspend
> with UDC bound (E850+)") incorrectly added clk_bulk_disable() as the
> inverse of clk_bulk_prepare_enable() while it should have of course
> used clk_bulk_disable_unprepare(). This means incorrect reference
> counts to the CMU driver remain.
>
> Update the code accordingly.
>
> Fixes: f4fb9c4d7f94 ("phy: exynos5-usbdrd: allow DWC3 runtime suspend with UDC bound (E850+)")
> CC: stable at vger.kernel.org
> Signed-off-by: André Draszik <andre.draszik at linaro.org>
> ---

Reviewed-by: Peter Griffin <peter.griffin at linaro.org>