[PATCH 13/18] arm64: dts: renesas: r9a09g056: Add USB2.0 PHY VBUS internal regulator node
Tommaso Merciai
tommaso.merciai.xr at bp.renesas.com
Wed Oct 1 14:26:57 PDT 2025
USB2.0 PHY of the RZ/V2N SoC can drive VBUS line via the VBOUT bit of
the VBCTRL register.
Add VBUS regulator nodes (usb2_phy0_vbus_otg) under the usb2_phy0
node to describe this hw functionality.
This enables proper management of VBUS for USB2.0 OTG devices and ensures
compliance with hardware requirements.
Signed-off-by: Tommaso Merciai <tommaso.merciai.xr at bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a09g056.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g056.dtsi b/arch/arm64/boot/dts/renesas/r9a09g056.dtsi
index 887110878906..1cd489e3df52 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g056.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g056.dtsi
@@ -659,6 +659,12 @@ usb2_phy0: usb-phy at 15800200 {
#phy-cells = <1>;
power-domains = <&cpg>;
status = "disabled";
+
+ usb2_phy0_vbus_otg: vbus-regulator {
+ regulator-name = "USB2PHY0-VBUS-OTG";
+ regulator-boot-on;
+ status = "disabled";
+ };
};
hsusb: usb at 15820000 {
--
2.43.0
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