[PATCH v2 1/2] dt-bindings: phy: samsung,usb3-drd-phy: add dt-schema for ExynosAutov920

[Pritam Manohar Sutar]

Hi Krzysztof, 

> -----Original Message-----
> From: Krzysztof Kozlowski <krzk at kernel.org>
> Sent: 21 May 2025 02:15 PM
> To: Pritam Manohar Sutar <pritam.sutar at samsung.com>; vkoul at kernel.org;
> kishon at kernel.org; robh at kernel.org; krzk+dt at kernel.org;
> conor+dt at kernel.org; alim.akhtar at samsung.com; andre.draszik at linaro.org;
> peter.griffin at linaro.org; kauschluss at disroot.org;
> m.szyprowski at samsung.com; s.nawrocki at samsung.com
> Cc: linux-phy at lists.infradead.org; devicetree at vger.kernel.org; linux-
> kernel at vger.kernel.org; linux-arm-kernel at lists.infradead.org; linux-samsung-
> soc at vger.kernel.org; rosa.pila at samsung.com; dev.tailor at samsung.com;
> faraz.ata at samsung.com; muhammed.ali at samsung.com;
> selvarasu.g at samsung.com
> Subject: Re: [PATCH v2 1/2] dt-bindings: phy: samsung,usb3-drd-phy: add dt-
> schema for ExynosAutov920
> 
> On 21/05/2025 08:48, Pritam Manohar Sutar wrote:
> >>> diff --git
> >>> a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml
> >>> b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml
> >>> index fdddddc7d611..c50f4218ded9 100644
> >>> ---
> >>> a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml
> >>> +++ b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yam
> >>> +++ l
> >>> @@ -32,6 +32,7 @@ properties:
> >>>        - samsung,exynos7-usbdrd-phy
> >>>        - samsung,exynos7870-usbdrd-phy
> >>>        - samsung,exynos850-usbdrd-phy
> >>> +      - samsung,exynosautov920-usb31drd-phy
> >>>
> >>>    clocks:
> >>>      minItems: 2
> >>> @@ -204,6 +205,32 @@ allOf:
> >>>          reg-names:
> >>>            maxItems: 1
> >>>
> >>> +  - if:
> >>> +      properties:
> >>> +        compatible:
> >>> +          contains:
> >>> +            const: samsung,exynosautov920-usb31drd-phy
> >>> +    then:
> >>> +      $ref: /schemas/usb/usb-switch.yaml#
> >>> +
> >>> +      properties:
> >>> +        clocks:
> >>> +          items:
> >>
> >> Why there is no main PHY clock?
> >
> > external crystal clk (ext_xtal) is used as main phy clk.
> 
> So this is the main phy clock? This describes the clock input, not what you have
> on your board. If you change external crystal to internal clock in one design, you
> change the binding? No, this makes no sense.
> 
> 

Yes, this is the main phy clock. Will revisit the binding and try reusing existing one.

> 
> Best regards,
> Krzysztof

Thank you,
Pritam