[PATCH v2 2/2] arm64: dts: qcom: sa8775p: Remove max link speed property for PCIe EP

Mrinmay Sarkar mrinmay.sarkar at oss.qualcomm.com
Fri May 16 03:29:02 PDT 2025


On Fri, May 16, 2025 at 2:30 PM Konrad Dybcio
<konrad.dybcio at oss.qualcomm.com> wrote:
>
> On 5/14/25 6:38 PM, neil.armstrong at linaro.org wrote:
> > On 14/05/2025 13:37, Mrinmay Sarkar wrote:
> >> From: Mrinmay Sarkar <mrinmay.sarkar at oss.qualcomm.com>
> >>
> >> The maximum link speed was previously restricted to Gen3 due to the
> >> absence of Gen4 equalization support in the driver.
> >>
> >> Add change to remove max link speed property, Since Gen4 equalization
> >> support has already been added into the driver.
> >
> > Which driver, PHY or Controller ?
>
> Controller, see
>
> 09483959e34d ("PCI: dwc: Add support for configuring lane equalization presets")

Yes, this patch is helping to solve gen4 stability issue.
>
> and commits around it
>
> does this change depends on the patch 1 PHY settings update ?
>
> That I'm curious about too, but I would guesstimate no
>
this change doesn't depends on the patch 1 PHY settings update

> Konrad

Mrinmay



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