[PATCH v3 2/4] arm64: dts: qcom: qcs615: enable pcie

[Krzysztof Kozlowski]

On Mon, Mar 10, 2025 at 02:56:11PM +0800, Ziyue Zhang wrote:
> From: Krishna chaitanya chundru <quic_krichai at quicinc.com>
> 
> Add configurations in devicetree for PCIe0, including registers, clocks,
> interrupts and phy setting sequence.
> 
> Signed-off-by: Krishna chaitanya chundru <quic_krichai at quicinc.com>
> Signed-off-by: Ziyue Zhang <quic_ziyuzhan at quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/qcs615.dtsi | 142 +++++++++++++++++++++++++++
>  1 file changed, 142 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi
> index f4abfad474ea..282072084435 100644
> --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi
> @@ -1001,6 +1001,148 @@ mmss_noc: interconnect at 1740000 {
>  			qcom,bcm-voters = <&apps_bcm_voter>;
>  		};
>  
> +	pcie: pcie at 1c08000 {

Incorrect indentation (I am not going to look at anything else here).

Binding wasn't tested (you expect community to be the tools), this has
obvious style issue, so I really do not believe you performed internal
review.

Quality of patches recently coming from quicinc is really poor. That's
one more example. I raised it internally and it seems it reaches people
slow, so here you have a public nagging.

Do the internal review before you post.

Best regards,
Krzysztof