[PATCH v3 1/4] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings
Johan Hovold
johan at kernel.org
Fri Jun 27 02:27:09 PDT 2025
On Wed, Jun 25, 2025 at 05:00:45PM +0800, Ziyue Zhang wrote:
> The gcc_aux_clk is required by the PCIe controller but not by the PCIe
> PHY. In PCIe PHY, the source of aux_clk used in low-power mode should
> be gcc_phy_aux_clk. Hence, remove gcc_aux_clk and replace it with
> gcc_phy_aux_clk.
>
> Removed the phy_aux clock from the PCIe PHY binding as it is no longer
> used by any instance.
Please add the Fixes tags I mentioned earlier which identifies the
commits that added the bogus clock.
> Signed-off-by: Ziyue Zhang <quic_ziyuzhan at quicinc.com>
> ---
> .../bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 7 +++----
> 1 file changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
> index 2c6c9296e4c0..57b16444eb0e 100644
> --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
> @@ -54,7 +54,7 @@ properties:
>
> clocks:
> minItems: 5
> - maxItems: 7
> + maxItems: 6
You remove the last user of the bogus clock (qcs8300) in a separate
series so you should keep it until then.
> clock-names:
> minItems: 5
> @@ -65,7 +65,6 @@ properties:
> - enum: [rchng, refgen]
> - const: pipe
> - const: pipediv2
> - - const: phy_aux
>
> power-domains:
> maxItems: 1
> @@ -176,6 +175,8 @@ allOf:
> contains:
> enum:
> - qcom,qcs615-qmp-gen3x1-pcie-phy
> + - qcom,sa8775p-qmp-gen4x2-pcie-phy
> + - qcom,sa8775p-qmp-gen4x4-pcie-phy
> - qcom,sc8280xp-qmp-gen3x1-pcie-phy
> - qcom,sc8280xp-qmp-gen3x2-pcie-phy
> - qcom,sc8280xp-qmp-gen3x4-pcie-phy
> @@ -197,8 +198,6 @@ allOf:
> contains:
> enum:
> - qcom,qcs8300-qmp-gen4x2-pcie-phy
^
> - - qcom,sa8775p-qmp-gen4x2-pcie-phy
> - - qcom,sa8775p-qmp-gen4x4-pcie-phy
Johan
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