[PATCH v1 2/7] nvmem: qcom-spmi-sdam: Migrate to devm_spmi_subdevice_alloc_and_add()
Casey Connolly
casey.connolly at linaro.org
Mon Jul 21 03:44:26 PDT 2025
Hi Angelo,
On 21/07/2025 09:55, AngeloGioacchino Del Regno wrote:
> Some Qualcomm PMICs integrate a SDAM device, internally located in
> a specific address range reachable through SPMI communication.
>
> Instead of using the parent SPMI device (the main PMIC) as a kind
> of syscon in this driver, register a new SPMI sub-device for SDAM
> and initialize its own regmap with this sub-device's specific base
> address, retrieved from the devicetree.
>
> This allows to stop manually adding the register base address to
> every R/W call in this driver, as this can be, and is now, handled
> by the regmap API instead.
This is honestly a really nice improvement :D>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
> ---
> drivers/nvmem/qcom-spmi-sdam.c | 41 +++++++++++++++++++++++++---------
> 1 file changed, 30 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/nvmem/qcom-spmi-sdam.c b/drivers/nvmem/qcom-spmi-sdam.c
> index 4f1cca6eab71..1b80e8563a33 100644
> --- a/drivers/nvmem/qcom-spmi-sdam.c
> +++ b/drivers/nvmem/qcom-spmi-sdam.c
> @@ -9,6 +9,7 @@
> #include <linux/nvmem-provider.h>
> #include <linux/platform_device.h>
> #include <linux/regmap.h>
> +#include <linux/spmi.h>
>
> #define SDAM_MEM_START 0x40
> #define REGISTER_MAP_ID 0x40
> @@ -20,7 +21,6 @@
> struct sdam_chip {
> struct regmap *regmap;
> struct nvmem_config sdam_config;
> - unsigned int base;
> unsigned int size;
> };
>
> @@ -73,7 +73,7 @@ static int sdam_read(void *priv, unsigned int offset, void *val,
> return -EINVAL;
> }
>
> - rc = regmap_bulk_read(sdam->regmap, sdam->base + offset, val, bytes);
> + rc = regmap_bulk_read(sdam->regmap, offset, val, bytes);
> if (rc < 0)
> dev_err(dev, "Failed to read SDAM offset %#x len=%zd, rc=%d\n",
> offset, bytes, rc);
> @@ -100,7 +100,7 @@ static int sdam_write(void *priv, unsigned int offset, void *val,
> return -EINVAL;
> }
>
> - rc = regmap_bulk_write(sdam->regmap, sdam->base + offset, val, bytes);
> + rc = regmap_bulk_write(sdam->regmap, offset, val, bytes);
> if (rc < 0)
> dev_err(dev, "Failed to write SDAM offset %#x len=%zd, rc=%d\n",
> offset, bytes, rc);
> @@ -110,28 +110,47 @@ static int sdam_write(void *priv, unsigned int offset, void *val,
>
> static int sdam_probe(struct platform_device *pdev)
> {
> + struct regmap_config sdam_regmap_config = {
> + .reg_bits = 16,
> + .val_bits = 16,
I believe registers are 8 bits wide, at least on Qualcomm platforms.
Kind regards,
--
// Casey (she/her)
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