[RESEND PATCH v9 1/4] PCI: rockchip: Use standard PCIe defines

[Manivannan Sadhasivam]

On Tue, Jul 01, 2025 at 09:03:31AM GMT, Geraldo Nascimento wrote:
> On Tue, Jul 01, 2025 at 09:54:51AM +0200, Philipp Stanner wrote:
> > On Mon, 2025-06-30 at 19:24 -0300, Geraldo Nascimento wrote:
> > > Current code uses custom-defined register offsets and bitfields for
> > > standard PCIe registers. Change to using standard PCIe defines. Since
> > > we are now using standard PCIe defines, drop unused custom-defined
> > > ones,
> > > which are now referenced from offset at added Capabilities Register.
> > 
> > This could be phrased a bit more cleanly. At least I don't get exactly
> > what "from offset" means. You mean you replace the unused custom ones?
> > But if they're unused, why are they even being replaced?
> 
> Hi Philipp!
> 
> "from offset" means we use standard PCIe defines for registers that are
> adjacent to Capabilities Register, and we reference them from the offset
> at Capabilities Register.
> 
> No, all registers replaced are in use, unused in that context means they
> (the custom-defined registers which can be referenced starting from
> Capabilities Register address) become unused after the change, only.
> 

I've reworded the commit message:
https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git/commit/?h=controller/rockchip&id=04e740dfe153f2b6530ce99c0e346600d3fb2ef7

> > 
> > 
> > > 
> > > Suggested-By: Bjorn Helgaas <bhelgaas at google.com>
> > 
> > s/By/by
> 
> Thanks for the capitalization catch. Unfortunately there's little I can do
> now that Mani went ahead and applied the first two patches (directly
> related to PCI subsystem).
> 

This was already taken care!

- Mani

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